Works matching VHDL (Computer hardware description language)

Results: 122

Hardware implementation of evolutionary algorithms using dynamic reconfiguration technology.

Published in:

Natural Computing, 2015, v. 14, n. 4, p. 593, doi. 10.1007/s11047-014-9476-z

By:

Kanasugi, Akinori;
Tsukahara, Akihiko;
Ando, Ki

Publication type:

Article

Development of Library Components for Floating Point Processor.

Published in:

Journal of Ultra Scientist of Physical Sciences - Section A (Mathematics), 2021, v. 33, n. 4, p. 42, doi. 10.22147/jusps-A/330402

By:

SHARMA, SUBHASH KUMAR;
DUBEY, SHRI PRAKASH;
MISHRA, ANIL KUMAR

Publication type:

Article

Efficient Two-Stage Max-Pooling Engines for an FPGA-Based Convolutional Neural Network.

Published in:

Electronics (2079-9292), 2023, v. 12, n. 19, p. 4043, doi. 10.3390/electronics12194043

By:

Hong, Eonpyo;
Choi, Kang-A;
Joo, Jhihoon

Publication type:

Article

Comparison of Different Design Alternatives for Hardware-in-the-Loop of Power Converters.

Published in:

Electronics (2079-9292), 2021, v. 10, n. 8, p. 926, doi. 10.3390/electronics10080926

By:

Zamiri, Elyas;
Sanchez, Alberto;
Yushkova, Marina;
Martínez-García, Maria Sofia;
de Castro, Angel

Publication type:

Article

A Cryptosystem Architecture and Design for Encrypted Data Transmissions.

Published in:

Electrotehnica, Electronica, Automatica, 2019, v. 67, n. 2, p. 76

By:

BABA-AHMED, Mohammed Zakarya;
BENMANSOUR, Fatima Zohra;
SEDJELMACI, Amina

Publication type:

Article

DESIGN AND SIMULATION OF SINGLE-PRECISION INEXACT FLOATING-POINT ADDER/SUBTRACTOR.

Published in:

i-Manager's Journal on Electronics Engineering, 2016, v. 6, n. 4, p. 7, doi. 10.26634/jele.6.4.8087

By:

KUMAR, B. VENKATA VINOD;
BASHA, S. K. MAHABOOB

Publication type:

Article

DESIGN AND ANALYSIS OF 32X32 BIT ALU USING HIGH-SPEED VEDIC-WALLACE MULTIPLIER BASED ON VEDIC MATHEMATICS.

Published in:

i-Manager's Journal on Electronics Engineering, 2016, v. 6, n. 3, p. 7, doi. 10.26634/jele.6.3.5954

By:

KONDU DHARITHA REDDY;
MAHESH, P. V.

Publication type:

Article

AN EFFICIENT ARCHITECTURE FOR SINGLE PRECISION FLOATING POINT MULTIPLIER USING VARIOUS ALGORITHMS.

Published in:

i-Manager's Journal on Electronics Engineering, 2015, v. 5, n. 3, p. 11, doi. 10.26634/jele.5.3.3393

By:

KUMAR K., CHARAN;
KUMAR K., SUNIL

Publication type:

Article

VHDL-AMS-Based Modeling of an Asymmetric H-Type Half-Bridge Converter for Mutually Coupled SRM.

Published in:

Karaelmas Science & Engineering Journal / Karaelmas Fen ve Mühendislik Dergisi, 2018, v. 8, n. 1, p. 211

By:

Şahin, Cihan;
Amaç, Ayşe Ergün;
Karaçor, Mevlüt

Publication type:

Article

Implementing Quadratic Function with Resource Constraints Using MicroBlaze Soft-Core in Xilinx EDK.

Published in:

IUP Journal of Telecommunications, 2015, v. 7, n. 1, p. 7

By:

Mishra, Ashish;
Kedar, Kunal P.;
Shah, Hardik M.;
Raju, K. S.

Publication type:

Article

FPGA Implementation of EPC Gen-2 Protocol and Its Performance Evaluation.

Published in:

IUP Journal of Telecommunications, 2014, v. 6, n. 1, p. 58

By:

Bag, Joyashree;
Rajanna, K. M.;
Sarkar, Subir Kumar

Publication type:

Article

A Flexible Design of Network Devices Using Reconfigurable Content Addressable Memory.

Published in:

International Arab Journal of Information Technology (IAJIT), 2011, v. 8, n. 3, p. 235

By:

Ali, Qutaiba

Publication type:

Article

Contribution to Synchronization and Tracking Modelisation in a CDMA Receiver.

Published in:

Journal of Engineering (2314-4912), 2013, p. 1, doi. 10.1155/2013/936495

By:

Hassani, Aicha Alami;
Zouak, Mohcine;
Mrabti, Mostafa

Publication type:

Article

Design of 4 bits Combinational Lock Using VHDL.

Published in:

International Journal of Electrical, Electronics & Computer Systems, 2014, v. 19, n. 2, p. 15

By:

Ogeh, Jenny Ebitonere

Publication type:

Article

CONSTRUÇÃO DE UM BRAÇO ROBÓTICO CONTROLADO A PARTIR DE UM FPGA.

Published in:

Colloquium Exactarum, 2012, v. 4, n. 1, p. 1, doi. 10.5747/ce.2012.v04.n1.e040

By:

Mimoso Souza, Geovane;
Torres Delgado, Martha Ximena;
Xavier Cruz, Tiago

Publication type:

Article

Design and Implementation of a Network on Chip Using FPGA.

Published in:

Al-Rafadain Engineering Journal, 2013, v. 21, n. 1, p. 91

By:

Jabbar, A. I. A.;
AL Malah, Noor Th.

Publication type:

Article

A Reconfigurable Hybrid Architecture for HomePNA3.1/Ethernet MAC.

Published in:

Majlesi Journal of Electrical Engineering, 2011, v. 5, n. 4, p. 46

By:

Dermany, Mohammad Khalily;
Payegozar, Hamid;
Beheshti, Seyed Ahmad;
Ahmadi, Mohammad

Publication type:

Article

A case study of varying the EEG localization error using different electrode configurations: Embedded solution.

Published in:

Journal of Information Assurance & Security, 2016, v. 11, n. 5, p. 242

By:

Khemakhem, Rafik;
Frikha, Tarek;
Hadriche, Abir;
Diguet, Jean-Philippe

Publication type:

Article

A New Efficient Symmetric Encryption Algorithm Design and Implementation.

Published in:

Journal of Information Assurance & Security, 2012, v. 7, n. 2, p. 102

By:

Tawalbeh, Lo'ai;
Al-Hajsalem, Hend;
Abu-Qtaish, Tasneem;
Khatatbeh, Ayat

Publication type:

Article

Fast Processing of Non-Repeated Values in Hardware.

Published in:

Electronics & Electrical Engineering, 2017, v. 23, n. 3, p. 74, doi. 10.5755/j01.eie.23.3.18336

By:

Skliarova, Iouliia;
Sklyarov, Valery;
Sudnitson, Alexander

Publication type:

Article

Design and Implementation of Fuzzy Event-detection Algorithm for Border Monitoring on FPGA.

Published in:

International Journal of Fuzzy Systems, 2016, v. 18, n. 6, p. 1054, doi. 10.1007/s40815-015-0079-3

By:

Ahmed, Hossam;
Elkhatib, Mohamed;
Adly, Ihab;
Ragai, Hani

Publication type:

Article

SEU Fault-Injection in VHDL-Based Processors: A Case Study.

Published in:

Journal of Electronic Testing, 2013, v. 29, n. 1, p. 87, doi. 10.1007/s10836-013-5351-6

By:

Mansour, Wassim;
Velazco, Raoul

Publication type:

Article

Performance evaluation of a new efficient H.264 intraprediction scheme.

Published in:

Turkish Journal of Electrical Engineering & Computer Sciences, 2016, v. 24, n. 3, p. 1967, doi. 10.3906/elk-1312-250

By:

HAMDY, Sara;
IBRAHIM, Mostafa;
OSMAN, Mohamed

Publication type:

Article

A Synthesizable VHDL Model of the Exact Solution for Three-dimensional Hyperbolic Positioning System.

Published in:

VLSI Design, 2002, v. 15, n. 2, p. 507, doi. 10.1080/1065514021000012129

By:

Bucher, Ralph;
Misra, D.

Publication type:

Article

Design Procedure Based on VHDL Language Transformations.

Published in:

VLSI Design, 2002, v. 14, n. 4, p. 349, doi. 10.1080/10655140290011159

By:

Varga, László;
Hosszú, Gábor;
Kovács, Ferenc

Publication type:

Article

Invariant-Based Safety Assessment of FPGA Projects: Conception and Technique.

Published in:

Computers (2073-431X), 2021, v. 10, n. 10, p. 125, doi. 10.3390/computers10100125

By:

Kharchenko, Vyacheslav;
Illiashenko, Oleg;
Sklyar, Vladimir

Publication type:

Article

A Massively Parallel Implementation of a Modular Self-Organizing Map on FPGAs.

Published in:

Journal of Circuits, Systems & Computers, 2019, v. 28, n. 3, p. N.PAG, doi. 10.1142/S0218126619500543

By:

Khalifa, Khaled Ben;
Bedoui, Mohamed Hédi

Publication type:

Article

A Complete Embedded System Design of Breakout Game.

Published in:

Journal of Circuits, Systems & Computers, 2017, v. 26, n. 12, p. -1, doi. 10.1142/S0218126617501882

By:

Tural-Polat, Sadiye Nergis

Publication type:

Article

A Neuron Library for Rapid Realization of Artificial Neural Networks on FPGA: A Case Study of Rössler Chaotic System.

Published in:

Journal of Circuits, Systems & Computers, 2017, v. 26, n. 1, p. 1, doi. 10.1142/S0218126617500153

By:

Koyuncu, İsmail;
Şahin, İbrahim;
Gloster, Clay;
Sarıtekin, Namık Kemal

Publication type:

Article

Non-Cyclic Design Space Exploration for ASIPs - Compiler-Centered Microprocessor Design (CoMet).

Published in:

Journal of Circuits, Systems & Computers, 2016, v. 25, n. 3, p. -1, doi. 10.1142/S0218126616400120

By:

Urban, Roberto;
Vierhaus, Heinrich T.;
Schölzel, Mario;
Altmann, Enrico;
Seelig, Horst

Publication type:

Article

Simultaneous Multithreaded Matrix Processor.

Published in:

Journal of Circuits, Systems & Computers, 2015, v. 24, n. 8, p. -1, doi. 10.1142/S0218126615501145

By:

Soliman, Mostafa I.;
Elsayed, Elsayed A.

Publication type:

Article

VHDL Descriptions for the FPGA Implementation of PWL-Function-Based Multi-Scroll Chaotic Oscillators.

Published in:

PLoS ONE, 2016, v. 11, n. 12, p. 1, doi. 10.1371/journal.pone.0168300

By:

Tlelo-Cuautle, Esteban;
Quintas-Valles, Antonio de Jesus;
de la Fraga, Luis Gerardo;
Rangel-Magdaleno, Jose de Jesus

Publication type:

Article

Advanced Modulating Techniques for Multilevel Inverters by Using FPGA.

Published in:

International Review of Electrical Engineering, 2010, v. 5, n. 3, p. 842

By:

Reddy, V. Naga Bhaskar;
Rao, S. Nagaraja;
Babu, Ch. Sai

Publication type:

Article

Highly Parallel Modular Multiplier for Elliptic Curve Cryptography in Residue Number System.

Published in:

Circuits, Systems & Signal Processing, 2017, v. 36, n. 3, p. 1027, doi. 10.1007/s00034-016-0336-1

By:

Asif, Shahzad;
Kong, Yinan

Publication type:

Article

Parallelized and pipelined hardware implementation of computationally expensive prediction filters.

Published in:

Concurrency & Computation: Practice & Experience, 2009, v. 21, n. 18, p. 2478, doi. 10.1002/cpe.1480

By:

Gracia, Luis;
Perez-Vidal, Carlos

Publication type:

Article

MODIFIKUOTO POŽYMIŲ VAIZDE IŠSKYRIMO SURF ALGORITMO OBJEKTUI SEKTI REALIUOJU LAIKU ĮGYVENDINIMAS LAUKU PROGRAMUOJAMOJE LOGINĖJE MATRICOJE.

Published in:

Science: Future of Lithuania / Mokslas: Lietuvos Ateitis, 2013, v. 5, n. 2, p. 74, doi. 10.3846/mla.2013.12

By:

Sledevič, Tomyslav

Publication type:

Article

Image Encryption using Simple Algorithm on FPGA.

Published in:

Telkomnika, 2015, v. 13, n. 4, p. 1153, doi. 10.12928/TELKOMNIKA.v13i4.1787

By:

Prasetio, Barlian Henryranu;
Setiawan, Eko;
Muttaqin, Adharul

Publication type:

Article

FPGA Implementation ofLow-Area Square Root Calculator.

Published in:

Telkomnika, 2015, v. 13, n. 4, p. 1145, doi. 10.12928/TELKOMNIKA.v13i4.1894

By:

Jidin, Aiman Zakwan;
Sutikno, Tole

Publication type:

Article

Overview on Strategies and Approaches for FPGA Programming.

Published in:

Telkomnika, 2014, v. 12, n. 2, p. 273, doi. 10.12928/TELKOMNIKA.v12i2.1948

By:

Tole Sutikno;
Nik Idris, Nik Rumzi;
Jidin, Aiman Zakwan

Publication type:

Article

Development of IEEE-754 to Decimal Conversion of Library Components for Floating Point Arithmetic Logic Unit.

Published in:

International Transactions in Mathematical Sciences & Computer, 2011, v. 4, n. 2, p. 165

By:

Jha, Udai Kumar;
Sharma, Subhash Kumar

Publication type:

Article

FPGA Implementation of a Hybrid On-line Process Monitoring in PC Based Real-Time Systems.

Published in:

Serbian Journal of Electrical Engineering, 2011, v. 8, n. 1, p. 37, doi. 10.2298/SJEE1101037J

By:

Jovanović, Bojan;
Jevtić, Milun

Publication type:

Article

Modeling and Implementation of a Power Estimation Methodology for SystemC.

Published in:

International Journal of Reconfigurable Computing, 2012, p. 1, doi. 10.1155/2012/439727

By:

Kuehnle, Matthias;
Wagner, Andre;
Brito, Alisson V.;
Becker, Juergen

Publication type:

Article

A High-Throughput Hardware Architecture for the H.264/AVC Half-Pixel Motion Estimation Targeting High-Definition Videos.

Published in:

International Journal of Reconfigurable Computing, 2011, p. 1, doi. 10.1155/2011/254730

By:

Corrêa, Marcel M.;
Schoenknecht, Mateus T.;
Dornelles, Robson S.;
Agostini, Luciano V.

Publication type:

Article

vMAGIC--Automatic Code Generation for VHDL.

Published in:

International Journal of Reconfigurable Computing, 2009, p. 1, doi. 10.1155/2009/205149

By:

Pohl, Christopher;
Paiz, Carlos;
Porrmann, Mario

Publication type:

Article

Design of a Mathematical Unit in FPGA for the Implementation of the Control of a Magnetic Levitation System.

Published in:

International Journal of Reconfigurable Computing, 2008, p. 1, doi. 10.1155/2008/634306

By:

Raygoza-Panduro, Juan José;
Ortega-Cisneros, Susana;
Rivera, Jorge;
de laMora, Alberto

Publication type:

Article

A Real-Time Histogram Equalization System with Automatic Gain Control Using FPGA.

Published in:

KSII Transactions on Internet & Information Systems, 2010, v. 4, n. 4, p. 633, doi. 10.3837/tiis.2010.08.0011

By:

Junguk Cho;
Seunghun Jin;
Key Ho Kwon;
Jae Wook Jeon

Publication type:

Article

Implementation of NonLinear Controller with Anti-Windup on Xilinx FPGA.

Published in:

Arabian Journal for Science & Engineering (Springer Science & Business Media B.V. ), 2024, v. 49, n. 9, p. 13005, doi. 10.1007/s13369-024-08912-y

By:

Ahmed, Samet;
Yahia, Kourd;
Dimitri, Lefebvre

Publication type:

Article

Improved Data Preprocessing Algorithm for Time-Domain Induced Polarization Method with Digital Notch Filter.

Published in:

Acta Geophysica, 2016, v. 64, n. 6, p. 2264, doi. 10.1515/acgeo-2016-0015

By:

Ge, Shuang-Chao;
Deng, Ming;
Chen, Kai;
Li, Yuan;
Li, Bin

Publication type:

Article

Decodificador Turbo MAP de varias iteraciones.

Published in:

Ingeniería y Desarrollo, 2006, n. 20, p. 106

By:

Chávez, Richard;
Gamarra, Gabriel;
Pardo, Mauricio

Publication type:

Article

A Review on FPGA Implementation of Distributed Canny Edge Detector.

Published in:

Grenze International Journal of Engineering & Technology (GIJET), 2017, v. 3, n. 3, p. 94

By:

Chandrashekar, N. S.;
Nataraj, K. R.

Publication type:

Article