Works matching IS 25821458 AND DT 2020 AND VI 2 AND IP 2
Results: 6
Design and Analysis of Full Adders Using Reversible Logic.
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- Journal of VLSI Circuits & Systems (JVCS), 2020, v. 2, n. 2, p. 1, doi. 10.31838/jvcs/02.02.01
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- Article
Design of Set Based D Flip-Flop for High-Speed Applications.
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- Journal of VLSI Circuits & Systems (JVCS), 2020, v. 2, n. 2, p. 18, doi. 10.31838/jvcs/02.02.06
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- Article
Statistical analysis of Gate Diffusion Input based full adders: from delay and Power perspective.
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- Journal of VLSI Circuits & Systems (JVCS), 2020, v. 2, n. 2, p. 12, doi. 10.31838/jvcs/02.02.04
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- Article
Design Of High Precision and Frequency Full Wave Rectifier.
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- Journal of VLSI Circuits & Systems (JVCS), 2020, v. 2, n. 2, p. 15, doi. 10.31838/jvcs/02.02.05
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- Article
Analysis of Low Power Gdi Based Alu for High-Speed Applications.
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- Journal of VLSI Circuits & Systems (JVCS), 2020, v. 2, n. 2, p. 9, doi. 10.31838/jvcs/02.02.03
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- Article
Analysis of Reliability for Flash Type Analog to Digital Converter.
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- Journal of VLSI Circuits & Systems (JVCS), 2020, v. 2, n. 2, p. 5, doi. 10.31838/jvcs/02.02.02
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- Article