Works matching IS 20894864 AND DT 2020 AND VI 9 AND IP 2

Results: 9

Modern design approach of faults (toggling faults,bridge faults and SAT) of reduced ordered binary decision diagram based on combo & sequential blocks.

Published in:

International Journal of Reconfigurable & Embedded Systems, 2020, v. 9, n. 2, p. 158, doi. 10.11591/ijres.v9.i2.pp158-168

By:

Rayudu, K. V. B. V.;
Jahagirdar;
Rao, P. Srihari

Publication type:

Article

A system verilog approach for verification of memory controller.

Published in:

International Journal of Reconfigurable & Embedded Systems, 2020, v. 9, n. 2, p. 153, doi. 10.11591/ijres.v9.i2.pp153-157

By:

Sowmya K. B.;
Gagana P.

Publication type:

Article

Data ecryption based on multi-order FrFT, and FPGA implementation of DES algorithm.

Published in:

International Journal of Reconfigurable & Embedded Systems, 2020, v. 9, n. 2, p. 141, doi. 10.11591/ijres.v9.i2.pp141-152

By:

Rabie, A.;
El Shafie, Kh.;
Hammuoda, A.;
Rohiem, M.

Publication type:

Article

Arduino controller based borewell child rescue system.

Published in:

International Journal of Reconfigurable & Embedded Systems, 2020, v. 9, n. 2, p. 133, doi. 10.11591/ijres.v9.i2.pp133-140

By:

Prakash, S.;
V., Melvin Paul Miki;
Amarnath M. K. V.;
Kumar, K. Naveen

Publication type:

Article

Design and development of combat robot for military applications.

Published in:

International Journal of Reconfigurable & Embedded Systems, 2020, v. 9, n. 2, p. 125, doi. 10.11591/ijres.v9.i2.pp125-132

By:

Hajare, Raju;
C. P., Mallikarjuna Gowda

Publication type:

Article

Design and analysis of different full adder cells using new technologies.

Published in:

International Journal of Reconfigurable & Embedded Systems, 2020, v. 9, n. 2, p. 116, doi. 10.11591/ijres.v9.i2.pp116-124

By:

Kumar, Nandhaiahgari Dinesh;
Somineni, Rajendra Prasad;
Kumari, CH. Raja

Publication type:

Article

Efficient robust speech recognition with empirical mode decomposition using an FPGA chip with dual core.

Published in:

International Journal of Reconfigurable & Embedded Systems, 2020, v. 9, n. 2, p. 109, doi. 10.11591/ijres.v9.i2.pp109-115

By:

Shing-Tai Pan;
Ching-Fa Chen;
Wen-Sin Tseng

Publication type:

Article

A hardware system with ARM-based data processing for nano satellites.

Published in:

International Journal of Reconfigurable & Embedded Systems, 2020, v. 9, n. 2, p. 102, doi. 10.11591/ijres.v9.i2.pp102-108

By:

Stacul, Adrián;
Pastafiglia, Daniel;
Di Giovanni, Ariel Dalmas;
Morales, Martín;
Saluzzi, Sergio;
García, Gerardo;
Gadea, Agustín;
Puga, Ramiro

Publication type:

Article

Dynamic modeling of the birefringence effects induced in semiconductor optical amplifier for all-optical telecommunication systems.

Published in:

International Journal of Reconfigurable & Embedded Systems, 2020, v. 9, n. 2, p. 93, doi. 10.11591/ijres.v9.i2.pp93-101

By:

Elyamani;
Zatni, A.;
Moumen, A.;
Bousseta, H.

Publication type:

Article