Shift Register Initialization in Scalar Replacement for Reducing Code Size.
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- IPSJ Transactions on System LSI Design Methodology, 2020, v. 13, n. 1, p. 2, doi. 10.2197/ipsjtsldm.13.2
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Works matching IS 18826687 AND DT 2020 AND VI 13 AND IP 1
Results: 11
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Message from the Editor-in-Chief.
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- IPSJ Transactions on System LSI Design Methodology, 2020, v. 13, n. 1, p. 1, doi. 10.2197/ipsjtsldm.13.1
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- Publication type:
- Article
3
Synthesis and Generalization of Parallel Algorithm for Matrix-vector Multiplication.
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- IPSJ Transactions on System LSI Design Methodology, 2020, v. 13, n. 1, p. 31, doi. 10.2197/ipsjtsldm.13.31
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- Publication type:
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4
R-GCN Based Function Inference for Gate-level Netlist.
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- IPSJ Transactions on System LSI Design Methodology, 2020, v. 13, n. 1, p. 69, doi. 10.2197/ipsjtsldm.13.69
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- Article
5
A Dynamic Programming Algorithm for Energy-aware Routing of Delivery Drones.
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- IPSJ Transactions on System LSI Design Methodology, 2020, v. 13, n. 1, p. 65, doi. 10.2197/ipsjtsldm.13.65
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- Publication type:
- Article
6
Universal NBTI Compact Model Replicating AC Stress/Recovery from a Single-shot Long-term DC Measurement.
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- IPSJ Transactions on System LSI Design Methodology, 2020, v. 13, n. 1, p. 56, doi. 10.2197/ipsjtsldm.13.56
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- Publication type:
- Article
7
Interconnect Electromigration Modeling and Analysis for Nanometer ICs: From Physics to Full-Chip.
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- IPSJ Transactions on System LSI Design Methodology, 2020, v. 13, n. 1, p. 42, doi. 10.2197/ipsjtsldm.13.42
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- Publication type:
- Article
8
Measurement of Variations in FPGAs under Various Load Conditions.
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- IPSJ Transactions on System LSI Design Methodology, 2020, v. 13, n. 1, p. 39, doi. 10.2197/ipsjtsldm.13.39
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- Publication type:
- Article
9
A Logic Optimization Method by Eliminating Redundant Multiple Faults from Higher to Lower Cardinality.
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- IPSJ Transactions on System LSI Design Methodology, 2020, v. 13, n. 1, p. 35, doi. 10.2197/ipsjtsldm.13.35
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- Publication type:
- Article
10
Real Circuit Delay Measurement Method by Variable Frequency Operation with On-Chip Fine Resolution Oscillator.
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- IPSJ Transactions on System LSI Design Methodology, 2020, v. 13, n. 1, p. 21, doi. 10.2197/ipsjtsldm.13.21
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- Publication type:
- Article
11
Scalable Stochastic Number Duplicators for Accuracy-flexible Arithmetic Circuit Design.
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- IPSJ Transactions on System LSI Design Methodology, 2020, v. 13, n. 1, p. 10, doi. 10.2197/ipsjtsldm.13.10
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- Article