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Works matching IS 17518601 AND DT 2015 AND VI 9 AND IP 5

Results: 5

1

H.264/AVC high definition intra coding implementation on multiprocessor system on chip technology architecture.

Published in:

IET Computers & Digital Techniques (Wiley-Blackwell), 2015, v. 9, n. 5, p. 259, doi. 10.1049/iet-cdt.2014.0151

By:

Belhadj, Nidhameddine;
Bahri, Nejmeddine;
Marrakchi, Zied;
Ben Ayed, Mohamed Ali;
Masmoudi, Nouri;
Mehrez, Habib

Publication type:

Article

2

Optimisation of test architecture in three‐dimensional stacked integrated circuits for partial stack/complete stack using hard system‐on‐chips.

Published in:

IET Computers & Digital Techniques (Wiley-Blackwell), 2015, v. 9, n. 5, p. 268, doi. 10.1049/iet-cdt.2014.0137

By:

Roy, Surajit Kumar;
Giri, Chandan;
Rahaman, Hafizur

Publication type:

Article

3

Cluster‐based approach for improving graphics processing unit performance by inter streaming multiprocessors locality.

Published in:

IET Computers & Digital Techniques (Wiley-Blackwell), 2015, v. 9, n. 5, p. 275, doi. 10.1049/iet-cdt.2014.0092

By:

Keshtegar, Mohammad Mahdi;
Falahati, Hajar;
Hessabi, Shaahin

Publication type:

Article

4

Very‐large‐scale integration implementation of a 16‐bit clocked adiabatic logic logarithmic signal processor.

Published in:

IET Computers & Digital Techniques (Wiley-Blackwell), 2015, v. 9, n. 5, p. 239, doi. 10.1049/iet-cdt.2014.0102

By:

Yemiscioglu, Gurtac;
Lee, Peter

Publication type:

Article

5

Reducing the system standby power of a personal computer.

Published in:

IET Computers & Digital Techniques (Wiley-Blackwell), 2015, v. 9, n. 5, p. 248, doi. 10.1049/iet-cdt.2013.0137

By:

Huang, Te;
Bai, Ying‐Wen;
Chao, Shih‐Kuan

Publication type:

Article