Works matching IS 15550281 AND DT 2024 AND VI 18 AND IP 2
Results: 6
Comparative Analysis of Various Logic Families Based One Bit Full Adder Circuits For Energy and EDP Efficient Computing Applications.
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- Journal of Active & Passive Electronic Devices, 2024, v. 18, n. 2, p. 131
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- Article
Design and Performance Analysis of Low-Power Arithmetic Circuits.
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- Journal of Active & Passive Electronic Devices, 2024, v. 18, n. 2, p. 161
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Design, Simulation and Optimization of MEMS-based Piezoresistive Biosensor with Stress Concentration Region for Biosensing Applications.
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- Journal of Active & Passive Electronic Devices, 2024, v. 18, n. 2, p. 153
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A g-sensor Based Alarm System for Multiple Tilt Sensor Applications Using VHDL and FPGAs.
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- Journal of Active & Passive Electronic Devices, 2024, v. 18, n. 2, p. 119
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- Article
Minimization of Leakage Current Control in CMOS Adder Circuits Using Parametric Variations.
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- Journal of Active & Passive Electronic Devices, 2024, v. 18, n. 2, p. 105
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- Article
Memory Read/Write Access Time with Loop Gain Using FinFET Based 16 Bits Array for Faster Medical Data Analysis.
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- Journal of Active & Passive Electronic Devices, 2024, v. 18, n. 2, p. 91
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- Article