Works matching IS 15514897 AND DT 2020 AND VI 17 AND IP 3
Results: 5
Development of High Thermally Conductive Die Attach for TIM Applications.
- Published in:
- Journal of Microelectronic & Electronic Packaging, 2020, v. 17, n. 3, p. 106, doi. 10.4071/imaps.1125402
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- Article
High-Temperature Double-Layer Ceramic Packaging Substrates.
- Published in:
- Journal of Microelectronic & Electronic Packaging, 2020, v. 17, n. 3, p. 99, doi. 10.4071/imaps.1123535
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- Publication type:
- Article
Chip-Last (RDL-First) Fan-Out Panel-Level Packaging (FOPLP) for Heterogeneous Integration.
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- Journal of Microelectronic & Electronic Packaging, 2020, v. 17, n. 3, p. 89, doi. 10.4071/imaps.1137828
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- Article
High-Density Interconnect Technology Assessment of Printed Circuit Boards for Space Applications.
- Published in:
- Journal of Microelectronic & Electronic Packaging, 2020, v. 17, n. 3, p. 79, doi. 10.4071/imaps.1212898
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- Article
A New Halogen-Free Parylene for High Performance and Reliability of Microelectronics in Harsh Environments.
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- Journal of Microelectronic & Electronic Packaging, 2020, v. 17, n. 3, p. 73, doi. 10.4071/imaps.1120416
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- Article