Reduction of Power Dissipation in Dynamic BiCMOS Logic Gates by Transistor Reordering.
- Published in:
- VLSI Design, 2002, v. 15, n. 2, p. 547, doi. 10.1080/1065514021000012165
- By:
- Publication type:
- Article
Works matching IS 1065514X AND DT 2002 AND VI 15 AND IP 2
Results: 8
1
2
Minimizing Spurious Switching Activities with Transistor Sizing.
- Published in:
- VLSI Design, 2002, v. 15, n. 2, p. 537, doi. 10.1080/1065514021000012156
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- Publication type:
- Article
3
A Synthesizable VHDL Model of the Exact Solution for Three-dimensional Hyperbolic Positioning System.
- Published in:
- VLSI Design, 2002, v. 15, n. 2, p. 507, doi. 10.1080/1065514021000012129
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- Publication type:
- Article
4
A Contraction-based Ratio-cut Partitioning Algorithm.
- Published in:
- VLSI Design, 2002, v. 15, n. 2, p. 485, doi. 10.1080/1065514021000012093
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- Publication type:
- Article
5
Hardware Architectures for the Orthogonal and Biorthogonal Wavelet Transform.
- Published in:
- VLSI Design, 2002, v. 15, n. 2, p. 499, doi. 10.1080/1065514021000012110
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- Publication type:
- Article
6
A Dynamically Reconfigurable Video Compression Scheme Using FPGAs with Coarse-grain Parallelism.
- Published in:
- VLSI Design, 2002, v. 15, n. 2, p. 521, doi. 10.1080/1065514021000012138
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- Publication type:
- Article
7
A Combined Coefficient Segmentation and Block Processing Algorithm for Low Power Implementation of FIR Digital Filters.
- Published in:
- VLSI Design, 2002, v. 15, n. 2, p. 529, doi. 10.1080/1065514021000012147
- By:
- Publication type:
- Article
8
Improving Datapath Testability by Modifying Controller Specification.
- Published in:
- VLSI Design, 2002, v. 15, n. 2, p. 491, doi. 10.1080/1065514021000012101
- By:
- Publication type:
- Article