Works matching IS 09739238 AND DT 2014 AND VI 8 AND IP 1
Results: 3
Comparative Analysis of Self-Controllable Voltage Level (SVL) and Stacking Power Gating Leakage Reduction Techniques Using in Sequential Logic Circuit at 45Nanometer Regime.
- Published in:
- International Journal on Intelligent Electronics Systems, 2014, v. 8, n. 1, p. 8, doi. 10.18000/ijies.30133
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- Publication type:
- Article
MODIFIED BYPASSING MULTIPLIER FOR POWER EFFICIENT FIR FILTER.
- Published in:
- International Journal on Intelligent Electronics Systems, 2014, v. 8, n. 1, p. 1, doi. 10.18000/ijies.30132
- By:
- Publication type:
- Article
ANALYSIS OF 3D FACE RECONSTRUCTION.
- Published in:
- International Journal on Intelligent Electronics Systems, 2014, v. 8, n. 1, p. 14, doi. 10.18000/ijies.30134
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- Publication type:
- Article