Editorial.
- Published in:
- Journal of Electronic Testing, 2025, v. 41, n. 1, p. 1, doi. 10.1007/s10836-025-06166-6
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- Publication type:
- Article
Works matching IS 09238174 AND DT 2025 AND VI 41 AND IP 1
Results: 9
1
2
2024 Reviewers.
- Published in:
- Journal of Electronic Testing, 2025, v. 41, n. 1, p. 3, doi. 10.1007/s10836-025-06164-8
- Publication type:
- Article
3
Quantity Analysis Method for Text-Based Chip Test Datasets from Automated Test Equipment.
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- Journal of Electronic Testing, 2025, v. 41, n. 1, p. 27, doi. 10.1007/s10836-025-06163-9
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- Article
4
SEU Fault Injection Strategy for SRAM-based FPGA User Memory Based on Dual-Circuit Model.
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- Journal of Electronic Testing, 2025, v. 41, n. 1, p. 75, doi. 10.1007/s10836-025-06162-w
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- Article
5
Inherent Hardware Identifiers: Advancing IC Traceability and Provenance in the Multi-Die Era.
- Published in:
- Journal of Electronic Testing, 2025, v. 41, n. 1, p. 85, doi. 10.1007/s10836-025-06161-x
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- Publication type:
- Article
6
Read & Write Stability of CNTFET 6T SRAM Cell: A Comprehensive Analysis.
- Published in:
- Journal of Electronic Testing, 2025, v. 41, n. 1, p. 15, doi. 10.1007/s10836-025-06160-y
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- Publication type:
- Article
7
Design and Simulation of a Dependable Architecture Using Triple Modular Redundancy for Embedded Cyber-Physical Systems.
- Published in:
- Journal of Electronic Testing, 2025, v. 41, n. 1, p. 63, doi. 10.1007/s10836-025-06159-5
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- Publication type:
- Article
8
Design of a Low Noise Amplifier Based on Novel Monolayer Graphene FET.
- Published in:
- Journal of Electronic Testing, 2025, v. 41, n. 1, p. 5, doi. 10.1007/s10836-025-06158-6
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- Publication type:
- Article
9
Fault-Aware Test Case Prioritization in Software Testing Using Jaya Archimedes Optimization Algorithm.
- Published in:
- Journal of Electronic Testing, 2025, v. 41, n. 1, p. 41, doi. 10.1007/s10836-025-06157-7
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- Publication type:
- Article