Works matching IS 09238174 AND DT 2020 AND VI 36 AND IP 1

Results: 14

2019 Reviewers.

Published in:: 2020
Publication type:: Announcement

Multi-Threaded Mitigation of Radiation-Induced Soft Errors in Bare-Metal Embedded Systems.

Published in:

Journal of Electronic Testing, 2020, v. 36, n. 1, p. 47, doi. 10.1007/s10836-019-05846-4

By:

Serrano-Cases, Alejandro;
Restrepo-Calle, Felipe;
Cuenca-Asensi, Sergio;
Martínez-Álvarez, Antonio

Publication type:

Article

New Editor – 2020.

Published in:: 2020
Publication type:: Announcement

Editorial.

Published in:

2020

By:

Agrawal, Vishwani D.

Publication type:

Editorial

Test Technology Newsletter February 2020.

Published in:: Journal of Electronic Testing, 2020, v. 36, n. 1, p. 7, doi. 10.1007/s10836-020-05860-x
Publication type:: Article

On Using Approximate Computing to Build an Error Detection Scheme for Arithmetic Circuits.

Published in:

Journal of Electronic Testing, 2020, v. 36, n. 1, p. 33, doi. 10.1007/s10836-020-05858-5

By:

Deveautour, B.;
Virazel, A.;
Girard, P.;
Gherman, V.

Publication type:

Article

Reliability Model and Sensitivity Analysis for General Electronic Systems with Failure Types based on Non-identical Correlated Components.

Published in:

Journal of Electronic Testing, 2020, v. 36, n. 1, p. 9, doi. 10.1007/s10836-019-05853-5

By:

Banitaba, Seyed Mostafa;
Ahari, Roya M.;
Karbasian, Mahdi

Publication type:

Article

High-Level Implementation-Independent Functional Software-Based Self-Test for RISC Processors.

Published in:

2020

By:

Oyeniran, Adeboye Stephen;
Ubar, Raimund;
Jenihhin, Maksim;
Raik, Jaan

Publication type:

Letter

Improved Pseudo-Random Fault Coverage Through Inversions: a Study on Test Point Architectures.

Published in:

Journal of Electronic Testing, 2020, v. 36, n. 1, p. 123, doi. 10.1007/s10836-020-05859-4

By:

Roy, Soham;
Stiene, Brandon;
Millican, Spencer K.;
Agrawal, Vishwani D.

Publication type:

Article

Trojan Detection Test for Clockless Circuits.

Published in:

Journal of Electronic Testing, 2020, v. 36, n. 1, p. 23, doi. 10.1007/s10836-020-05857-6

By:

Guazzelli, Ricardo Aquino;
Trindade, Matheus Garay;
Guimarães, Leonel Acunha;
de Paiva Leite, Thiago Ferreira;
Fesquet, Laurent;
Bastos, Rodrigo Possamai

Publication type:

Article

An Efficient Accuracy Reconfigurable CLA Adder Designs Using Complementary Logic.

Published in:

Journal of Electronic Testing, 2020, v. 36, n. 1, p. 135, doi. 10.1007/s10836-019-05851-7

By:

Patel, Sujit Kumar;
Garg, Bharat;
Rai, Shireesh Kumar

Publication type:

Article

An Efficient Test Set Construction Scheme for Multiple Missing-Gate Faults in Reversible Circuits.

Published in:

Journal of Electronic Testing, 2020, v. 36, n. 1, p. 105, doi. 10.1007/s10836-020-05855-8

By:

Handique, Mousum;
Deka, Jantindra Kumar;
Biswas, Santosh

Publication type:

Article

Optimal Selection of Tests for Fault Diagnosis in Multi-Path System with Time-delay.

Published in:

Journal of Electronic Testing, 2020, v. 36, n. 1, p. 75, doi. 10.1007/s10836-020-05854-9

By:

Yao, Zhexi;
Zhu, Lingchao;
Zhang, Tao;
Wang, Jinbo

Publication type:

Article

Modeling Remapping Based Fault Tolerance Techniques for Chip Multiprocessor Cache with Design Space Exploration.

Published in:

Journal of Electronic Testing, 2020, v. 36, n. 1, p. 59, doi. 10.1007/s10836-019-05852-6

By:

Choudhury, Avishek;
Sikdar, Biplab K.

Publication type:

Article