Works matching IS 09238174 AND DT 2019 AND VI 35 AND IP 6

Results: 14

Editorial.

Published in:

2019

By:

Agrawal, Vishwani D.

Publication type:

Editorial

An Efficient Technique to Detect Stealthy Hardware Trojans Independent of the Trigger Size.

Published in:

Journal of Electronic Testing, 2019, v. 35, n. 6, p. 839, doi. 10.1007/s10836-019-05848-2

By:

Sebt, S. M.;
Patooghy, A.;
Beitollahi, H.

Publication type:

Article

The Newsletter of the Test Technology Technical Council of the IEEE Computer Society Editor: Theo Theocharides.

Published in:: Journal of Electronic Testing, 2019, v. 35, n. 6, p. 765, doi. 10.1007/s10836-019-05847-3
Publication type:: Article

Repurposing FPGAs for Tester Design to Enhance Field-Testing in a 3D Stack.

Published in:

Journal of Electronic Testing, 2019, v. 35, n. 6, p. 887, doi. 10.1007/s10836-019-05845-5

By:

Sun, Yi;
Zhang, Fanchen;
Jiang, Hui;
Nepal, Kundan;
Dworak, Jennifer;
Manikas, Theodore;
Bahar, R. Iris

Publication type:

Article

Comparing Graph-Based Algorithms to Generate Test Cases from Finite State Machines.

Published in:

Journal of Electronic Testing, 2019, v. 35, n. 6, p. 867, doi. 10.1007/s10836-019-05844-6

By:

Mariano, Matheus Monteiro;
de Souza, Érica Ferreira;
Endo, André Takeshi;
Vijaykumar, Nandamudi Lankalapalli

Publication type:

Article

Multi-Step-Ahead Prediction for a CMOS Low Noise Amplifier Aging Due to NBTI and HCI Using Neural Networks.

Published in:

Journal of Electronic Testing, 2019, v. 35, n. 6, p. 797, doi. 10.1007/s10836-019-05843-7

By:

Yang, Chuang;
Feng, Feng

Publication type:

Article

Efficient Built-In Test and Calibration of High Speed Serial I/O Systems Using Monobit Signal Acquisition.

Published in:

Journal of Electronic Testing, 2019, v. 35, n. 6, p. 809, doi. 10.1007/s10836-019-05842-8

By:

Moon, Thomas;
Choi, Hyun Woo;
Keezer, David C.;
Chatterjee, Abhijit

Publication type:

Article

DVFS Based Error Avoidance Strategy in Wireless Network-on-Chip.

Published in:

Journal of Electronic Testing, 2019, v. 35, n. 6, p. 767, doi. 10.1007/s10836-019-05841-9

By:

Ouyang, Yiming;
Wang, Qi;
Hu, Lizhu;
Liang, Huaguo

Publication type:

Article

Fault Localization and Testability Approaches for FPGA Fabric Aware Canonic Signed Digit Recoding Implementations.

Published in:

Journal of Electronic Testing, 2019, v. 35, n. 6, p. 779, doi. 10.1007/s10836-019-05840-w

By:

Palchaudhuri, Ayan;
Dhar, Anindya Sundar

Publication type:

Article

Noise and Spur Comparison of Delta-Sigma Modulators in Fractional-N PLLs.

Published in:

Journal of Electronic Testing, 2019, v. 35, n. 6, p. 917, doi. 10.1007/s10836-019-05839-3

By:

Zhou, Bo;
Li, Yao;
Zhao, Fuyuan

Publication type:

Article

Design of Approximate Subtractors and Dividers for Error Tolerant Image Processing Applications.

Published in:

Journal of Electronic Testing, 2019, v. 35, n. 6, p. 901, doi. 10.1007/s10836-019-05837-5

By:

Gorantla, Anusha;
Deepa, P.

Publication type:

Article

Leveraging Balanced Logic Gates as Strong PUFs for Securing IoT Against Malicious Attacks.

Published in:

Journal of Electronic Testing, 2019, v. 35, n. 6, p. 853, doi. 10.1007/s10836-019-05833-9

By:

Yu, Weize;
Wen, Yiming

Publication type:

Article

Multi-PVT-Point Analysis and Comparison of Recent Small-Delay Defect Quality Metrics.

Published in:

Journal of Electronic Testing, 2019, v. 35, n. 6, p. 823, doi. 10.1007/s10836-019-05832-w

By:

Al-Terkawi Hasib, Omar;
Savaria, Yvon;
Thibeault, Claude

Publication type:

Article

A Single Event Upset Resilient Latch Design with Single Node Upset Immunity.

Published in:

Journal of Electronic Testing, 2019, v. 35, n. 6, p. 909, doi. 10.1007/s10836-019-05823-x

By:

Dai, Xixi;
Wang, Haibin;
Chu, Jiamin;
Liu, Zhi;
Cai, Li;
Yan, Kang

Publication type:

Article