Works matching IS 09238174 AND DT 2014 AND VI 30 AND IP 1
Results: 14
Clock Faults Induced Min and Max Delay Violations.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 1, p. 111, doi. 10.1007/s10836-013-5426-4
- By:
- Publication type:
- Article
New Editor.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 1, p. 3, doi. 10.1007/s10836-014-5436-x
- Publication type:
- Article
Applications of Boolean Satisfiability to Verification and Testing of Switch-Level Circuits.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 1, p. 41, doi. 10.1007/s10836-014-5433-0
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- Publication type:
- Article
Wide Dynamic Range CMOS Amplifier Design for RF Signal Power Detection via Electro-Thermal Coupling.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 1, p. 101, doi. 10.1007/s10836-013-5427-3
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- Publication type:
- Article
Simulation Based Framework for Accurately Estimating Dynamic Power-Supply Noise and Path Delay.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 1, p. 125, doi. 10.1007/s10836-013-5425-5
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- Publication type:
- Article
Single-Event Transient Measurements on a DC/DC Pulse Width Modulator Using Heavy Ion, Proton, and Pulsed Laser.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 1, p. 149, doi. 10.1007/s10836-013-5431-7
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- Publication type:
- Article
Counterfeit Integrated Circuits: Detection, Avoidance, and the Challenges Ahead.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 1, p. 9, doi. 10.1007/s10836-013-5430-8
- By:
- Publication type:
- Article
A Comprehensive Framework for Counterfeit Defect Coverage Analysis and Detection Assessment.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 1, p. 25, doi. 10.1007/s10836-013-5428-2
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- Publication type:
- Article
Test Technology Newsletter.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 1, p. 7, doi. 10.1007/s10836-014-5434-z
- Publication type:
- Article
A Novel Wafer Manipulation Method for Yield Improvement and Cost Reduction of 3D Wafer-on-Wafer Stacked ICs.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 1, p. 57, doi. 10.1007/s10836-013-5429-1
- By:
- Publication type:
- Article
2013 Reviewers.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 1, p. 5, doi. 10.1007/s10836-014-5437-9
- Publication type:
- Article
Editorial.
- Published in:
- 2014
- By:
- Publication type:
- Editorial
Study of Low-Cost Electrical Test Strategies for Post-Silicon Yield Improvement of MEMS Convective Accelerometers.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 1, p. 87, doi. 10.1007/s10836-013-5423-7
- By:
- Publication type:
- Article
Low Power Memory Built in Self Test Address Generator Using Clock Controlled Linear Feedback Shift Registers.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 1, p. 77, doi. 10.1007/s10836-014-5432-1
- By:
- Publication type:
- Article