Natural instruction level parallelism-aware compiler for high-performance QueueCore processor architecture.
- Published in:
- Journal of Supercomputing, 2011, v. 57, n. 3, p. 314, doi. 10.1007/s11227-010-0409-z
- By:
- Publication type:
- Article
Works matching IS 09208542 AND DT 2011 AND VI 57 AND IP 3
Results: 6
1
2
Enhanced GridSim architecture with load balancing.
- Published in:
- Journal of Supercomputing, 2011, v. 57, n. 3, p. 265, doi. 10.1007/s11227-010-0402-6
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- Publication type:
- Article
3
A technique for non-invasive application-level checkpointing.
- Published in:
- Journal of Supercomputing, 2011, v. 57, n. 3, p. 227, doi. 10.1007/s11227-010-0383-5
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- Publication type:
- Article
4
Condition for relaxed Monte Carlo method of solving systems of linear equations.
- Published in:
- Journal of Supercomputing, 2011, v. 57, n. 3, p. 256, doi. 10.1007/s11227-010-0400-8
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- Publication type:
- Article
5
Analysis of Multi-Sort Algorithm on Multi-Mesh of Trees (MMT) architecture.
- Published in:
- Journal of Supercomputing, 2011, v. 57, n. 3, p. 276, doi. 10.1007/s11227-010-0404-4
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- Publication type:
- Article
6
A parameter study of a hybrid Laplacian mean-curvature flow denoising model.
- Published in:
- Journal of Supercomputing, 2011, v. 57, n. 3, p. 339, doi. 10.1007/s11227-010-0417-z
- By:
- Publication type:
- Article