Extensible Recognition of Algorithmic Patterns in DSP Programs for Automatic Parallelization.
- Published in:
- International Journal of Parallel Programming, 2013, v. 41, n. 6, p. 806, doi. 10.1007/s10766-012-0229-2
- By:
- Publication type:
- Article
Works matching IS 08857458 AND DT 2013 AND VI 41 AND IP 6
Results: 7
1
2
Compiler Infrastructure.
- Published in:
- 2013
- By:
- Publication type:
- Editorial
3
Compiler-Assisted Checkpointing of Parallel Codes: The Cetus and LLVM Experience.
- Published in:
- International Journal of Parallel Programming, 2013, v. 41, n. 6, p. 782, doi. 10.1007/s10766-012-0231-8
- By:
- Publication type:
- Article
4
An Infrastructure for Tackling Input-Sensitivity of GPU Program Optimizations.
- Published in:
- International Journal of Parallel Programming, 2013, v. 41, n. 6, p. 855, doi. 10.1007/s10766-012-0236-3
- By:
- Publication type:
- Article
5
Experiences Developing the OpenUH Compiler and Runtime Infrastructure.
- Published in:
- International Journal of Parallel Programming, 2013, v. 41, n. 6, p. 825, doi. 10.1007/s10766-012-0230-9
- By:
- Publication type:
- Article
6
The Cetus Source-to-Source Compiler Infrastructure: Overview and Evaluation.
- Published in:
- International Journal of Parallel Programming, 2013, v. 41, n. 6, p. 753, doi. 10.1007/s10766-012-0211-z
- By:
- Publication type:
- Article
7
The Implementation of a High Performance GPGPU Compiler.
- Published in:
- International Journal of Parallel Programming, 2013, v. 41, n. 6, p. 768, doi. 10.1007/s10766-012-0228-3
- By:
- Publication type:
- Article