Found: 22
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Investigation of a Heterogeneous RLC Lattice with Triangular Topology, Excited by a Lumped Voltage Source.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3655, doi. 10.1007/s00034-021-01651-7
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- Article
Deterministic Digital Calibration Technique for 1.5 bits/stage Pipelined and Algorithmic ADCs with Finite op-amp Gain and Large Capacitance Mismatches.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3684, doi. 10.1007/s00034-021-01652-6
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- Article
Wideband Inductorless True Time Delay Cell Based on CMOS Inverter for Timed Array Receivers.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3703, doi. 10.1007/s00034-021-01656-2
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- Article
Sparse Estimation Technique for Digital Pre-distortion of Impedance-Mismatched Power Amplifiers.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3727, doi. 10.1007/s00034-021-01659-z
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- Article
Asynchronous H∞ Control of Uncertain Switched Singular Systems with Time-Varying Delays.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3756, doi. 10.1007/s00034-020-01645-x
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- Article
Fast Computation of 3D Discrete Invariant Moments Based on 3D Cuboid for 3D Image Classification.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3782, doi. 10.1007/s00034-020-01646-w
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- Article
Mel Scale-Based Linear Prediction Approach to Reduce the Prediction Filter Order in CELP Paradigm.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3813, doi. 10.1007/s00034-021-01647-3
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- Article
A Low Area FPGA Implementation of Reversible Gate Encryption with Heterogeneous Key Generation.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3836, doi. 10.1007/s00034-021-01649-1
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- Article
Stability of Digital Filters with State-Delay and External Interference.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3866, doi. 10.1007/s00034-021-01650-8
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- Article
Jitter Modeling in Digital CDR with Quantization Noise Analysis.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3884, doi. 10.1007/s00034-021-01653-5
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- Article
RANSAC-Based Signal Denoising Using Compressive Sensing.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3907, doi. 10.1007/s00034-021-01654-4
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- Article
A Novel Contrast Enhancement Technique using Gradient-Based Joint Histogram Equalization.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3929, doi. 10.1007/s00034-021-01655-3
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- Article
A Hybrid Deep Ensemble for Speech Disfluency Classification.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3968, doi. 10.1007/s00034-021-01657-1
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- Article
Rapid Speaker Adaptation Based on Combination of KPCA and Latent Variable Model.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 3996, doi. 10.1007/s00034-021-01660-6
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- Article
A Multiple Sources Localization Method Based on TDOA Without Association Ambiguity for Near and Far Mixed Field Sources.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 4018, doi. 10.1007/s00034-021-01661-5
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- Article
Performance Analysis in Higher-Order IIR Filter Structures with Application to EEG Signal.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 4047, doi. 10.1007/s00034-021-01662-4
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- Article
Event-Based Transformation of Misarticulated Stops in Cleft Lip and Palate Speech.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 4064, doi. 10.1007/s00034-021-01663-3
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- Article
CNFET-Based Ultra-Low-Power Dual-VDD Ternary Half Adder.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 4089, doi. 10.1007/s00034-021-01664-2
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- Article
A Low-Energy and Area-Efficient Vaq-Based Switching Scheme with Capacitor-Splitting Structure for SAR ADCs.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 4106, doi. 10.1007/s00034-021-01666-0
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- Article
Structured Network Pruning via Adversarial Multi-indicator Architecture Selection.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 4127, doi. 10.1007/s00034-021-01668-y
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- Article
Blind Reconstruction of Binary Linear Block Codes Based on Association Rules Mining.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 4144, doi. 10.1007/s00034-021-01669-x
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- Article
High-Performance Carry Select Adders.
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- Circuits, Systems & Signal Processing, 2021, v. 40, n. 8, p. 4169, doi. 10.1007/s00034-021-01658-0
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- Article