Works matching IS 02397528 AND DT 2021 AND VI 69 AND IP 2


Results: 33
    1
    2
    3
    4
    5
    6
    7
    8
    9
    10

    Improving LUT count of FPGA-based sequential blocks.

    Published in:
    Bulletin of the Polish Academy of Sciences: Technical Sciences, 2021, v. 69, n. 2, p. 1, doi. 10.24425/bpasts.2021.136728
    By:
    • BARKALOV, Alexander;
    • TITARENKO, Larysa;
    • MAZURKIEWICZ, Małgorzata;
    • KRZYWICKI, Kazimierz
    Publication type:
    Article
    11
    12
    13
    14
    15
    16
    17
    18
    19
    20
    21
    22
    23
    24
    25
    26
    27
    28
    29
    30
    31
    32

    Machine modelling and simulations.

    Published in:
    Bulletin of the Polish Academy of Sciences: Technical Sciences, 2021, v. 69, n. 2, p. 1, doi. 10.24425/bpasts.2021.136716
    By:
    • MACKO, Marek;
    • ROJEK, Izabela;
    • SÁGA, Milan;
    • BURCZYŃSKI, Tadeusz;
    • MIKOŁAJEWSKI, Dariusz
    Publication type:
    Article
    33