IMPROVED LOW-POWER HIGH-SPEED BUFFER AMPLIFIER WITH SLEW-RATE ENHANCEMENT FOR LCD APPLICATIONS.
- Published in:
- Journal of Circuits, Systems & Computers, 2010, v. 19, n. 2, p. 325, doi. 10.1142/S0218126610006086
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- Publication type:
- Article
Works in Journal of Circuits, Systems & Computers, 2010, Vol 19, Issue 2
Results: 13
1
2
TWO-PHASE SINUSOIDAL POWER-CLOCKED QUASI-ADIABATIC LOGIC CIRCUITS.
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- Journal of Circuits, Systems & Computers, 2010, v. 19, n. 2, p. 335, doi. 10.1142/S0218126610006098
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- Article
3
DESIGN AND SIMULATION OF MODULAR QUANTUM-DOT CELLULAR AUTOMATA MULTIPLEXERS FOR MEMORY ACCESSING.
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- Journal of Circuits, Systems & Computers, 2010, v. 19, n. 2, p. 349, doi. 10.1142/S0218126610006104
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- Article
4
OPTIMUM BLOCK ADAPTIVE ICA FOR SEPARATION OF REAL AND COMPLEX SIGNALS WITH KNOWN SOURCE DISTRIBUTIONS IN DYNAMIC FLAT FADING ENVIRONMENTS.
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- Journal of Circuits, Systems & Computers, 2010, v. 19, n. 2, p. 367, doi. 10.1142/S0218126610006116
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- Article
5
NEW ALL-PASS FILTER CIRCUIT COMPENSATING FOR C-CDBA NON-IDEALITIES.
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- Journal of Circuits, Systems & Computers, 2010, v. 19, n. 2, p. 381, doi. 10.1142/S0218126610006128
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- Article
6
A LOW-VOLTAGE LOW-POWER 10-BIT 200 MS/S PIPELINED ADC IN 90 NM CMOS.
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- Journal of Circuits, Systems & Computers, 2010, v. 19, n. 2, p. 393, doi. 10.1142/S021812661000613X
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- Article
7
GENERAL SPICE MODELS FOR MEMRISTOR AND APPLICATION TO CIRCUIT SIMULATION OF MEMRISTOR-BASED SYNAPSES AND MEMORY CELLS.
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- Journal of Circuits, Systems & Computers, 2010, v. 19, n. 2, p. 407, doi. 10.1142/S0218126610006141
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- Article
8
A SINGLE FORMULA AND ITS IMPLEMENTATION IN FPGA FOR ELLIPTIC CURVE POINT ADDITION USING AFFINE REPRESENTATION.
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- Journal of Circuits, Systems & Computers, 2010, v. 19, n. 2, p. 425, doi. 10.1142/S0218126610006153
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- Article
9
A GENETIC ALGORITHM METHODOLOGY TO FIND THE MAXIMUM DATAPATH COVERAGE FOR COMBINATIONAL LOGIC CIRCUITS.
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- Journal of Circuits, Systems & Computers, 2010, v. 19, n. 2, p. 435, doi. 10.1142/S0218126610006165
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- Article
10
A PARAMETRIC SLANT-HADAMARD SYSTEM FOR ROBUST IMAGE WATERMARKING.
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- Journal of Circuits, Systems & Computers, 2010, v. 19, n. 2, p. 451, doi. 10.1142/S0218126610006177
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- Article
11
AN ANALYTICAL CONGESTION MODEL WITH BOUNDED-BEND DETOURS.
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- Journal of Circuits, Systems & Computers, 2010, v. 19, n. 2, p. 479, doi. 10.1142/S0218126610006189
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- Publication type:
- Article
12
NOVEL SELF-REFERENCE BASED IMAGE WATERMARKING SCHEME.
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- Journal of Circuits, Systems & Computers, 2010, v. 19, n. 2, p. 491, doi. 10.1142/S0218126610006190
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- Publication type:
- Article
13
HARDWARE IMPLEMENTATION AND VERIFICATION OF FIR FILTER UTILIZING M-BIT PDA.
- Published in:
- Journal of Circuits, Systems & Computers, 2010, v. 19, n. 2, p. 503, doi. 10.1142/S0218126610006207
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- Publication type:
- Article