LSTM Cell Implementation on FPGAs.
- Published in:
- Parallel Processing Letters, 2021, v. 31, n. 2, p. N.PAG, doi. 10.1142/S0129626421500110
- By:
- Publication type:
- Article
Works matching IS 01296264 AND DT 2021 AND VI 31 AND IP 2
Results: 5
1
2
Exploiting Long-Term Temporal Cache Access Patterns for LRU Insertion Prioritization.
- Published in:
- Parallel Processing Letters, 2021, v. 31, n. 2, p. N.PAG, doi. 10.1142/S0129626421500109
- By:
- Publication type:
- Article
3
Accelerating Data-Parallel Neural Network Training with Weighted-Averaging Reparameterisation.
- Published in:
- Parallel Processing Letters, 2021, v. 31, n. 2, p. N.PAG, doi. 10.1142/S0129626421500092
- By:
- Publication type:
- Article
4
Integrating Amdahl-like Laws and Divisible Load Theory.
- Published in:
- Parallel Processing Letters, 2021, v. 31, n. 2, p. N.PAG, doi. 10.1142/S0129626421500080
- By:
- Publication type:
- Article
5
OpenMP Implementation of Parallel Longest Common Subsequence Algorithm for Mathematical Expression Retrieval.
- Published in:
- Parallel Processing Letters, 2021, v. 31, n. 2, p. N.PAG, doi. 10.1142/S0129626421500079
- By:
- Publication type:
- Article