Found: 6

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  • NEW ROBUST <sup>+</sup>/<sup>+</sup> DUAL-GATE CMOS TECHNOLOGY OPTIMIZED FOR LOW POWER OPERATION.

    Published in:
    International Journal of High Speed Electronics & Systems, 1994, v. 5, n. 2, p. 135, doi. 10.1142/S0129156494000073
    By:
    • YU, D.C.H.;
    • LEE, K.H.;
    • KORNBLIT, A.;
    • FU, C.C.;
    • YAN, R.H.;
    • LIN, H.D.
    Publication type:
    Article

  • LOW-POWER, LOW-VOLTAGE DESIGN-AN OVERVIEW.

    Published in:
    International Journal of High Speed Electronics & Systems, 1994, v. 5, n. 2, p. 145, doi. 10.1142/S0129156494000085
    By:
    • RAZAVI, BEHZAD
    Publication type:
    Article

  • PULSED LOW POWER CMOS.

    Published in:
    International Journal of High Speed Electronics & Systems, 1994, v. 5, n. 2, p. 159, doi. 10.1142/S0129156494000097
    By:
    • GABARA, THAD
    Publication type:
    Article

  • POWER ESTIMATION AND OPTIMIZATION AT THE LOGIC LEVEL.

    Published in:
    International Journal of High Speed Electronics & Systems, 1994, v. 5, n. 2, p. 179, doi. 10.1142/S0129156494000103
    By:
    • PEDRAM, MASSOUD
    Publication type:
    Article

  • SABSA: SWITCHING-ACTIVITY-BASED STATE ASSIGNMENT.

    Published in:
    International Journal of High Speed Electronics & Systems, 1994, v. 5, n. 2, p. 203, doi. 10.1142/S0129156494000115
    By:
    • WASHABAUGH, SCOTT;
    • FRANZON, PAUL D.;
    • NAGLE, H. TROY
    Publication type:
    Article

  • FOREWORD.

    Published in:
    International Journal of High Speed Electronics & Systems, 1994, v. 5, n. 2, p. iii, doi. 10.1142/S0129156494000309
    Publication type:
    Article