Works matching IS 01290657 AND DT 1993 AND VI 4 AND IP 4

Results: 15

AUTHOR INDEX VOLUME 4 (1993).

Published in:: International Journal of Neural Systems, 1993, v. 4, n. 4, p. 445, doi. 10.1142/S0129065793000407
Publication type:: Article

MULTIPROCESSOR AND MEMORY ARCHITECTURE OF THE NEUROCOMPUTER SYNAPSE-1.

Published in:

International Journal of Neural Systems, 1993, v. 4, n. 4, p. 333, doi. 10.1142/S0129065793000274

By:

RAMACHER, U.;
RAAB, W.;
ANLAUF, J.;
HACHMANN, U.;
BEICHTER, J.;
BRÜLS, N.;
WEßELING, M.;
SICHENEDER, E.;
MÄNNER, R.;
GLÄß, J.;
WURZ, A.

Publication type:

Article

GUEST EDITORIAL: NEURAL NETWORK HARDWARE.

Published in:: International Journal of Neural Systems, 1993, v. 4, n. 4, p. 307, doi. 10.1142/S0129065793000390
Publication type:: Article

A HARDWARE EFFICIENT CASCADABLE CHIP SET FOR ANN'S WITH ON-CHIP BACKPROPAGATION.

Published in:

International Journal of Neural Systems, 1993, v. 4, n. 4, p. 351, doi. 10.1142/S0129065793000298

By:

LEHMANN, TORSTEN

Publication type:

Article

RECENT DEVELOPMENTS IN NEURODYNAMICS AND THEIR IMPACT ON THE DESIGN OF NEURO-CHIPS.

Published in:

International Journal of Neural Systems, 1993, v. 4, n. 4, p. 309, doi. 10.1142/S0129065793000249

By:

RAMACHER, ULRICH;
SCHILDBERG, PETER

Publication type:

Article

ON-CHIP LEARNING WITH ANALOGUE VLSI NEURAL NETWORKS.

Published in:

International Journal of Neural Systems, 1993, v. 4, n. 4, p. 419, doi. 10.1142/S0129065793000341

By:

TARASSENKO, LIONEL;
TOMBS, JON;
CAIRNS, GRAHAM

Publication type:

Article

DESIGNING A CONNECTIONIST NETWORK SUPERCOMPUTER.

Published in:

International Journal of Neural Systems, 1993, v. 4, n. 4, p. 317, doi. 10.1142/S0129065793000250

By:

ASANOVIĆ, KRSTE;
BECK, JAMES;
FELDMAN, JERRY;
MORGAN, NELSON;
WAWRZYNEK, JOHN

Publication type:

Article

OPTOELECTRONIC IMPLEMENTATION OF NEURAL NETWORKS.

Published in:

International Journal of Neural Systems, 1993, v. 4, n. 4, p. 435, doi. 10.1142/S0129065793000365

By:

WEBB, R. P.

Publication type:

Article

ANALOGUE SYNAPTIC NOISE - IMPLICATIONS AND LEARNING IMPROVEMENTS.

Published in:

International Journal of Neural Systems, 1993, v. 4, n. 4, p. 427, doi. 10.1142/S0129065793000353

By:

EDWARDS, PETER J.;
MURRAY, ALAN F.

Publication type:

Article

ANALOG CIRCUITS FOR RELAXATION NETWORKS.

Published in:

International Journal of Neural Systems, 1993, v. 4, n. 4, p. 359, doi. 10.1142/S0129065793000304

By:

CARD, HOWARD

Publication type:

Article

AN ARCHITECTURE FOR FULLY INTEGRATED LARGE SCALE NEURAL NETWORKS.

Published in:

International Journal of Neural Systems, 1993, v. 4, n. 4, p. 327, doi. 10.1142/S0129065793000262

By:

BINNS, M. D.;
CLOUGH, F. J.;
GARTH, S. C. J.

Publication type:

Article

NEURAL NETWORK FEATURE DETECTOR FOR REAL-TIME VIDEO SIGNAL PROCESSING.

Published in:

International Journal of Neural Systems, 1993, v. 4, n. 4, p. 337, doi. 10.1142/S0129065793000286

By:

NAYLOR, DAVID;
JONES, SIMON;
MYERS, DAVID;
VINCENT, JOHN

Publication type:

Article

PULSE STREAM VLSI CIRCUITS AND SYSTEMS: THE EPSILON NEURAL NETWORK CHIPSET.

Published in:

International Journal of Neural Systems, 1993, v. 4, n. 4, p. 395, doi. 10.1142/S0129065793000328

By:

HAMILTON, ALISTER;
CHURCHER, STEPHEN;
EDWARDS, PETER J.;
JACKSON, GEOFFREY B.;
MURRAY, ALAN F.;
REEKIE, H. MARTIN

Publication type:

Article

USING COHERENT PULSE WIDTH AND EDGE MODULATIONS IN ARTIFICIAL NEURAL SYSTEMS.

Published in:

International Journal of Neural Systems, 1993, v. 4, n. 4, p. 407, doi. 10.1142/S012906579300033X

By:

REYNERI, L. M.;
CHIABERGE, M.;
DEL CORSO, D.

Publication type:

Article

KAKADU - A LOW POWER ANALOGUE NEURAL NETWORK CLASSIFIER.

Published in:

International Journal of Neural Systems, 1993, v. 4, n. 4, p. 381, doi. 10.1142/S0129065793000316

By:

LEONG, PHILIP H. W.;
JABRI, MARWAN A.

Publication type:

Article