Using constraint programming for the design of network-on-chip architectures.
- Published in:
- Computing, 2015, v. 97, n. 6, p. 579, doi. 10.1007/s00607-013-0359-4
- By:
- Publication type:
- Article
Works matching IS 0010485X AND DT 2015 AND VI 97 AND IP 6
Results: 8
1
2
Design and implementation of counting networks.
- Published in:
- Computing, 2015, v. 97, n. 6, p. 557, doi. 10.1007/s00607-013-0360-y
- By:
- Publication type:
- Article
3
A Light-weight fault-tolerant routing algorithm tolerating faulty links and routers.
- Published in:
- Computing, 2015, v. 97, n. 6, p. 631, doi. 10.1007/s00607-013-0362-9
- By:
- Publication type:
- Article
4
System on chip failure rate assessment using the executable model of a system.
- Published in:
- Computing, 2015, v. 97, n. 6, p. 611, doi. 10.1007/s00607-013-0372-7
- By:
- Publication type:
- Article
5
TurboLock: increasing associativity of lock table in transactional memory.
- Published in:
- Computing, 2015, v. 97, n. 6, p. 649, doi. 10.1007/s00607-013-0375-4
- By:
- Publication type:
- Article
6
Energy reduction in 3D NoCs through communication optimization.
- Published in:
- Computing, 2015, v. 97, n. 6, p. 593, doi. 10.1007/s00607-013-0378-1
- By:
- Publication type:
- Article
7
Special issue on on-chip parallel and network-based systems.
- Published in:
- 2015
- By:
- Publication type:
- Editorial
8
Decentralized task scheduling for a fixed priority multicore embedded RTOS.
- Published in:
- Computing, 2015, v. 97, n. 6, p. 543, doi. 10.1007/s00607-013-0358-5
- By:
- Publication type:
- Article