Works matching DE "TIME-digital conversion"

Results: 141

Analysis of the SEU Tolerance of an FPGA-Based Time-to-Digital Converter Using Emulation-Based Fault Injection.

Published in:

Electronics (2079-9292), 2025, v. 14, n. 11, p. 2176, doi. 10.3390/electronics14112176

By:

Siecha, Roza Teklehaimanot;
Alemu, Getachew;
Prinzie, Jeffrey;
Leroux, Paul

Publication type:

Article

Efficient quantum random number generation via simultaneously detecting photons in temporal and spatial dimensions.

Published in:

Scientific Reports, 2025, v. 15, n. 1, p. 1, doi. 10.1038/s41598-025-03680-7

By:

Wang, Bingkun;
Hu, Jianyong;
Li, Xingjian;
Liu, Jianqiang;
Wu, Shuxiao;
Li, Haizhen;
Zhang, Liwen;
Yang, Changgang;
Qiao, Zhixing;
Chen, Ruiyun;
Zhang, Guofeng;
Qin, Chengbing;
Xiao, Liantuan;
Jia, Suotang

Publication type:

Article

An Adaptive Downsampling FPGA-Based TDC Implementation for Time Measurement Improvement.

Published in:

Chips, 2022, v. 1, n. 3, p. 175, doi. 10.3390/chips1030012

By:

Dikopoulos, Evangelos;
Birbas, Michael;
Birbas, Alexios

Publication type:

Article

Multi-bit Sigma-Delta TDC Architecture with Improved Linearity.

Published in:

Journal of Electronic Testing, 2013, v. 29, n. 6, p. 879, doi. 10.1007/s10836-013-5408-6

By:

Uemori, Satoshi;
Ishii, Masamichi;
Kobayashi, Haruo;
Hirabayashi, Daiki;
Arakawa, Yuta;
Doi, Yuta;
Kobayashi, Osamu;
Matsuura, Tatsuji;
Niitsu, Kiichi;
Yano, Yuji;
Gake, Tatsuhiro;
Yamaguchi, Takahiro J.;
Takai, Nobukazu

Publication type:

Article

LiDAR 시스템용 절대시간 측정을 위한 위상고정루프 기반 시간 디지털 변환기 설계.

Published in:

Journal of the Korea Institute of Information & Communication Engineering, 2021, v. 25, n. 5, p. 677, doi. 10.6109/jkiice.2021.25.5.677

By:

Sang-Sun Yoo

Publication type:

Article

분해능 향상을 위해 듀얼 에지 플립플롭을 사용하는 시간-디지털 변환기.

Published in:

Journal of the Korea Institute of Information & Communication Engineering, 2019, v. 23, n. 7, p. 816, doi. 10.6109/jkiice.2019.23.7.816

By:

최진호

Publication type:

Article

Features of Implementation of Time-to-Digital Converters Based on FPGA (Review).

Published in:

Instruments & Experimental Techniques, 2024, v. 67, n. 5, p. 843, doi. 10.1134/S0020441224701677

By:

Shelkovnikov, E. Yu.;
Shlyahtin, K. A.

Publication type:

Article

A Time-To-Digital Converter with a Resolution of 2 ns.

Published in:

Instruments & Experimental Techniques, 2018, v. 61, n. 3, p. 355, doi. 10.1134/S0020441218030260

By:

Sidorkin, V. V.

Publication type:

Article

High-speed multichannel modules of time-to-digital converters with a picosecond time resolution for IHEP experimental setups.

Published in:

Instruments & Experimental Techniques, 2016, v. 59, n. 4, p. 527, doi. 10.1134/S0020441216030179

By:

Karpekov, Y.;
Senko, V.

Publication type:

Article

Data taking from multiwire chambers and hodoscopes at IHEP physical setups.

Published in:

Instruments & Experimental Techniques, 2016, v. 59, n. 2, p. 209, doi. 10.1134/S0020441216010139

By:

Shalanda, N.;
Soldatov, M.;
Senko, V.

Publication type:

Article

An FPGA-Integrated Time-to-Digital Converter Based on a Ring Oscillator for Programmable Delay Line Resolution Measurement.

Published in:

Journal of Electrical & Computer Engineering, 2014, p. 1, doi. 10.1155/2014/230803

By:

Chao Chen;
Shengwei Meng;
Zhenghuan Xia;
Guangyou Fang;
Hejun Yin

Publication type:

Article

Semidigital PLL Design for Low-Cost Low-Power Clock Generation.

Published in:

Journal of Electrical & Computer Engineering, 2011, p. 1, doi. 10.1155/2011/235843

By:

Ni Xu;
Woogeun Rhee;
Zhihua Wang

Publication type:

Article

A Novel Cyclic Time-to-Digital Converter Based on Triple-Slope Interpolation and Time Amplification.

Published in:

Radioengineering, 2015, v. 24, n. 3, p. 800, doi. 10.13164/re.2015.0800

By:

REZVANYVARDOM, Mahdi;
FARSHIDI, Ebrahim

Publication type:

Article

Highly digital 1 GS/s 7-bit PWM ADC in 65 nm CMOS using time-domain quantisation.

Published in:

Electronics Letters (Wiley-Blackwell), 2018, v. 54, n. 21, p. 1204, doi. 10.1049/el.2018.5393

By:

Saha, A.;
Harjani, R.

Publication type:

Article

Low-power TDC scheme using DLL-based gray counter for infrared imagers.

Published in:

Electronics Letters (Wiley-Blackwell), 2017, v. 53, n. 14, p. 922, doi. 10.1049/el.2017.0878

By:

Dahe Liu;
Wengao Lu;
Shanzhe Yu;
Zhongjian Chen

Publication type:

Article

Low-power DSM-UWB RFID-based sensor system with low-process sensitivity.

Published in:

Electronics Letters (Wiley-Blackwell), 2017, v. 53, n. 7, p. 504, doi. 10.1049/el.2016.4642

By:

Dongxuan Bao;
Zhuo Zou;
Yajie Qin;
Li-Rong Zheng

Publication type:

Article

5 GHz all-digital delay-locked loop for future memory systems beyond double data rate 4 synchronous dynamic random access memory.

Published in:

Electronics Letters (Wiley-Blackwell), 2015, v. 51, n. 24, p. 1973, doi. 10.1049/el.2015.2876

By:

Dongyeol Lee;
Jongsun Kim

Publication type:

Article

Small area 0.3 pJ/conv, 45 ps time-to-digital converter for arrays of silicon photomultiplier interfaces in 150 nm CMOS.

Published in:

Electronics Letters (Wiley-Blackwell), 2015, v. 51, n. 23, p. 1933, doi. 10.1049/el.2015.2761

By:

Perenzoni, M.;
Xu, H.;
Stoppa, D.

Publication type:

Article

Dual channel time-to-digital converter module with 10 ps resolution and 320 ns full scale range.

Published in:

Electronics Letters (Wiley-Blackwell), 2015, v. 51, n. 13, p. 994, doi. 10.1049/el.2014.4539

By:

Tamborini, D.;
Portaluppi, D.;
Villa, F.;
Zappa, F.

Publication type:

Article

Simultaneous process self-calibration method using TDC for 3D DDR4 DRAM.

Published in:

Electronics Letters (Wiley-Blackwell), 2014, v. 50, n. 22, p. 1579, doi. 10.1049/el.2014.1595

By:

Reum Oh;
J. Jang;
J. Kim;
Man Young Sung

Publication type:

Article

Method for picosecond time interval measurements based on frequency-switching sinusoidal shape.

Published in:

Electronics Letters (Wiley-Blackwell), 2013, v. 49, n. 13, p. 1, doi. 10.1049/el.2013.1075

By:

Ripamonti, G.;
Caponio, F.

Publication type:

Article

Duty-cycle detector based on time-to-digital conversion.

Published in:

Electronics Letters (Wiley-Blackwell), 2013, v. 49, n. 4, p. 63, doi. 10.1049/el.2012.4276

By:

Ravezzi, L.

Publication type:

Article

Low-power, wide-range time-to-digital converter for all digital phase-locked loops.

Published in:

Electronics Letters (Wiley-Blackwell), 2013, v. 49, n. 2, p. 33

By:

Jeong, C.-H.;
Kwon, C.-K.;
Kim, H.;
Hwang, I.-C.;
Kim, S.-W.

Publication type:

Article

All-digital PLL with ΔΣ DLL embedded TDC.

Published in:

Electronics Letters (Wiley-Blackwell), 2013, v. 49, n. 2, p. 13

By:

Han, Y.;
Lin, D.;
Geng, S.;
Xu, N.;
Rhee, W.;
Oh, T.-Y.;
Wang, Z.

Publication type:

Article

Reconfigurable Analog Preprocessing for Efficient Asynchronous Analog-to-Digital Conversion.

Published in:

Journal of Low Power Electronics & Applications, 2019, v. 9, n. 3, p. 25, doi. 10.3390/jlpea9030025

By:

Kelly, Brandon M.;
DiLello, Alexander T.;
Graham, David W.

Publication type:

Article

External oscillator‐less TDC‐based all‐digital temperature sensor.

Published in:

Electronics & Communications in Japan, 2019, v. 102, n. 5, p. 11, doi. 10.1002/ecj.12161

By:

Shimada, Hideto;
Mizuno, Kentaro

Publication type:

Article

A Novel Time-to-Digital Converter Based on Low-Jitter Phase-Locked Loop.

Published in:

IETE Journal of Research, 2017, v. 63, n. 3, p. 336, doi. 10.1080/03772063.2016.1274241

By:

Wu, Jin;
Wang, Chao;
Shi, Shu-fang;
Yu, Xiang-rong;
Zheng, Li-xia;
Sun, Wei-feng

Publication type:

Article

Design of a Novel Pipeline Time-to-Digital Converter Based on Dual-Slope Interpolation and Time Amplification.

Published in:

IETE Journal of Research, 2015, v. 61, n. 3, p. 300, doi. 10.1080/03772063.2015.1018849

By:

Rezvanyvardom, Mahdi;
Farshidi, Ebrahim

Publication type:

Article

Time Domain and Area Efficient Smart Temperature Sensor Exploiting Channel Length Modulation Coefficient.

Published in:

Journal of Circuits, Systems & Computers, 2024, v. 33, n. 13, p. 1, doi. 10.1142/S0218126624502384

By:

Chakraborty, Kuntal;
Majumder, Alak;
Mondal, Abir J

Publication type:

Article

Level-Crossing Sampling with Multiple Temporal Resolutions for Speech Signals.

Published in:

Journal of Circuits, Systems & Computers, 2022, v. 31, n. 9, p. 1, doi. 10.1142/S0218126622501493

By:

Premanand, B.;
Sheeba, V. S.

Publication type:

Article

An 8-bit Hybrid TDC/Single-Slope ADC with an Improved Continuous-Time Comparator.

Published in:

Journal of Circuits, Systems & Computers, 2022, v. 31, n. 1, p. 1, doi. 10.1142/S0218126622500050

By:

Naghieh, Pedram;
Rahiminejad, Ehsan

Publication type:

Article

A 9 Bit, 3.6 ps Resolution Pipeline Time-to-Digital Converter.

Published in:

Journal of Circuits, Systems & Computers, 2020, v. 29, n. 8, p. N.PAG, doi. 10.1142/S0218126620501248

By:

Goodarzi, Farshad;
Toofan, Siroos

Publication type:

Article

An Experimental Study of Metastability-Induced Glitching Behavior.

Published in:

Journal of Circuits, Systems & Computers, 2019, v. 28, p. N.PAG, doi. 10.1142/S0218126619400061

By:

Polzer, Thomas;
Huemer, Florian;
Steininger, Andreas

Publication type:

Article

Analysis and Design of a New 10-Bit High Accuracy and Resolution TDC by Elimination of Offset Voltage and Parasitic Capacitors Effects.

Published in:

Journal of Circuits, Systems & Computers, 2019, v. 28, n. 6, p. N.PAG, doi. 10.1142/S0218126619500956

By:

Rezvanyvardom, Mahdi;
Mirzaei, Amin

Publication type:

Article

A Low-Power High-Linear Time-to-Digital Converter for Measuring R-R Intervals in ECG Signal Optimized by Neural Network and TLBO Algorithm.

Published in:

Journal of Circuits, Systems & Computers, 2019, v. 28, n. 2, p. N.PAG, doi. 10.1142/S021812661950021X

By:

Ghanavati, B.;
Abiri, E.;
Salehi, M. R.;
Azhdari, N.

Publication type:

Article

Quantization Noise Analysis of Time-to-Digital-Converter-Based All-Digital Phase-Locked Loop and Frequency Discriminators.

Published in:

Journal of Circuits, Systems & Computers, 2016, v. 25, n. 11, p. -1, doi. 10.1142/S0218126616501310

By:

Park, Sungkyung;
Park, Chester Sungchung

Publication type:

Article

A New Triple-Slope Pipelined Time to Digital Converter by Stretching of Time.

Published in:

Journal of Circuits, Systems & Computers, 2015, v. 24, n. 9, p. -1, doi. 10.1142/S0218126615501352

By:

Rezvanyvardom, Mahdi;
Farshidi, Ebrahim

Publication type:

Article

A 10-Bit Column-Parallel Single Slope ADC Based on Two-Step TDC with Error Calibration for CMOS Image Sensors.

Published in:

Journal of Circuits, Systems & Computers, 2015, v. 24, n. 4, p. -1, doi. 10.1142/S0218126615500541

By:

Xu, Jiangtao;
Yu, Jing;
Huang, Fujun;
Nie, Kaiming

Publication type:

Article

A REVIEW OF CMOS TIME-TO-DIGITAL CONVERTER.

Published in:

Journal of Circuits, Systems & Computers, 2014, v. 23, n. 7, p. -1, doi. 10.1142/S0218126614300013

By:

WANG, ZIXUAN;
HUANG, CHENG;
WU, JIANHUI

Publication type:

Article

Entropy Analysis of FPGA Interconnect and Switch Matrices for Physical Unclonable Functions.

Published in:

Cryptography (2410-387X), 2024, v. 8, n. 3, p. 32, doi. 10.3390/cryptography8030032

By:

Jao, Jenilee;
Wilcox, Ian;
Plusquellic, Jim;
Paskaleva, Biliana;
Bochev, Pavel

Publication type:

Article

First Study of Bubble Error Artifacts in Field-Programmable Gate Array (FPGA)-Based Tapped Delay-Line Time-to-Digital Converters with Sum-of-Ones Decoder on Xilinx 28 nm 7-Series FPGA.

Published in:

Electronics (2079-9292), 2025, v. 14, n. 6, p. 1156, doi. 10.3390/electronics14061156

By:

Lusardi, Nicola;
Garzetti, Fabio;
Fiumicelli, Gabriele;
Morabito, Mattia;
Bonanno, Gabriele;
Ronconi, Enrico;
Costa, Andrea;
Geraci, Angelo

Publication type:

Article

Optimal Implementation of Tapped Delay Line Time-to-Digital Converters in 20 nm Xilinx UltraScale FPGAs.

Published in:

Electronics (2079-9292), 2024, v. 13, n. 24, p. 4888, doi. 10.3390/electronics13244888

By:

Morabito, Mattia;
Lusardi, Nicola;
Garzetti, Fabio;
Fiumicelli, Gabriele;
Bonanno, Gabriele;
Ronconi, Enrico;
Costa, Andrea;
Geraci, Angelo

Publication type:

Article

A Fully Synthesizable Fractional-N Digital Phase-Locked Loop with a Calibrated Dual-Referenced Interpolating Time-to-Digital Converter to Compensate for Process–Voltage–Temperature Variations.

Published in:

Electronics (2079-9292), 2024, v. 13, n. 18, p. 3598, doi. 10.3390/electronics13183598

By:

Kim, Seojin;
Kim, Youngsik;
Son, Hyunwoo;
Kim, Shinwoong

Publication type:

Article

Novel Power-Efficient Fast-Locking Phase-Locked Loop Based on Adaptive Time-to-Digital Converter-Aided Acceleration Compensation Technology.

Published in:

Electronics (2079-9292), 2024, v. 13, n. 18, p. 3586, doi. 10.3390/electronics13183586

By:

Sun, Ligong;
Luo, Yixin;
Deng, Zhiyao;
Wang, Jinchan;
Liu, Bo

Publication type:

Article

A Configurable Resolution Time-to-Digital Converter with Low PVT Sensitivity for LiDAR Applications.

Published in:

Electronics (2079-9292), 2024, v. 13, n. 15, p. 2923, doi. 10.3390/electronics13152923

By:

Sheng, Duo;
Huang, Hao-Ting;
Liu, Ruey-Lin;
Cheng, Cheng-I;
Wang, Xiao-Ti

Publication type:

Article

High-Performance Wave Union Time-to-Digital Converter Implementation Based on Routing Path Delays of FPGA.

Published in:

Electronics (2079-9292), 2024, v. 13, n. 12, p. 2359, doi. 10.3390/electronics13122359

By:

Siecha, Roza Teklehaimanot;
Alemu, Getachew;
Prinzie, Jeffrey;
Leroux, Paul

Publication type:

Article

New High-Rate Timestamp Management with Real-Time Configurable Virtual Delay and Dead Time for FPGA-Based Time-to-Digital Converters.

Published in:

Electronics (2079-9292), 2024, v. 13, n. 6, p. 1124, doi. 10.3390/electronics13061124

By:

Garzetti, Fabio;
Bonanno, Gabriele;
Lusardi, Nicola;
Ronconi, Enrico;
Costa, Andrea;
Geraci, Angelo

Publication type:

Article

Passive Electrical and Optical Methods of Ultra-Short Pulse Expansion for Event Timer-Based TDC in PPM Receiver.

Published in:

Electronics (2079-9292), 2023, v. 12, n. 22, p. 4634, doi. 10.3390/electronics12224634

By:

Aboltins, Arturs;
Solovjova, Tatjana;
Semenako, Janis;
Kusnins, Romans;
Migla, Sandis;
Sics, Pauls Eriks;
Selis, Oskars;
Tihomorskis, Nikolajs;
Prigunovs, Dmitrijs;
Ostrovskis, Armands;
Spolitis, Sandis

Publication type:

Article

Relative Jitter Measurement Methodology and Comparison of Clocking Resources Jitter in Artix 7 FPGA.

Published in:

Electronics (2079-9292), 2023, v. 12, n. 20, p. 4297, doi. 10.3390/electronics12204297

By:

Wojciechowski, Andrzej A.;
Marcinek, Krzysztof;
Pleskacz, Witold A.

Publication type:

Article

A Fast-Lock Variable-Gain TDC-Based N/M-Ratio MDLL Clock Multiplier.

Published in:

Electronics (2079-9292), 2023, v. 12, n. 19, p. 4136, doi. 10.3390/electronics12194136

By:

Jang, Chaeyoung;
Kim, Jongsun

Publication type:

Article