Works matching DE "SEQUENTIAL circuits"

Results: 145

Synthesis of an electronic system for controlling the conveyor line of rolling elements in the production of roller bearings.

Published in:

Advances in Science & Technology Research Journal, 2025, v. 19, n. 6, p. 426, doi. 10.12913/22998624/203416

By:

Szcześniak, Adam;
Szcześniak, Zbigniew

Publication type:

Article

Powering DNA strand-displacement reactions with a continuous flow reactor.

Published in:

Natural Computing, 2021, v. 20, n. 4, p. 821, doi. 10.1007/s11047-020-09795-2

By:

Cui, Xinyu;
Scalise, Dominic;
Schulman, Rebecca

Publication type:

Article

A community detection-based parallel algorithm for quantum circuit simulation using tensor networks: A Community Detection-Based Parallel Algorithm for Quantum Circuit...: A. M. Pastor et al.

Published in:

Journal of Supercomputing, 2025, v. 81, n. 3, p. 1, doi. 10.1007/s11227-025-06918-3

By:

Pastor, Alfred M.;
Badia, Jose M.;
Castillo, Maribel

Publication type:

Article

Majority‐based evolution state assignment algorithm for area and power optimisation of sequential circuits.

Published in:

IET Computers & Digital Techniques (Wiley-Blackwell), 2016, v. 10, n. 1, p. 30, doi. 10.1049/iet-cdt.2015.0038

By:

El‐Maleh, Aiman H.

Publication type:

Article

Graph of Outputs in the Process of Synthesis Directed at CPLDs.

Published in:

Mathematics (2227-7390), 2019, v. 7, n. 12, p. 1171, doi. 10.3390/math7121171

By:

Kubica, Marcin;
Kania, Dariusz

Publication type:

Article

A Multi-Bit Quantization Low-Latency Voltage Sense Amplifier Applied in RRAM Computing-in-Memory Macro Circuits.

Published in:

Electronics (2079-9292), 2024, v. 13, n. 2, p. 356, doi. 10.3390/electronics13020356

By:

Hu, Wei;
Zhang, Hangze;
Wei, Rongshan;
Chen, Qunchao

Publication type:

Article

Fault Mechanism and Improvement in the Augmented Railgun Excitation Circuit.

Published in:

Electronics (2079-9292), 2023, v. 12, n. 22, p. 4607, doi. 10.3390/electronics12224607

By:

Cao, Genrong;
Xiang, Hongjun;
Qiao, Zhiming;
Liang, Chunyan;
Yuan, Xichao

Publication type:

Article

Improving the Spatial Characteristics of Three-Level LUT-Based Mealy FSM Circuits.

Published in:

Electronics (2079-9292), 2023, v. 12, n. 5, p. 1133, doi. 10.3390/electronics12051133

By:

Barkalov, Alexander;
Titarenko, Larysa;
Mazurkiewicz, Małgorzata;
Krzywicki, Kazimierz

Publication type:

Article

A Gate-Level Information Leakage Detection Framework of Sequential Circuit Using Z3.

Published in:

Electronics (2079-9292), 2022, v. 11, n. 24, p. 4216, doi. 10.3390/electronics11244216

By:

Zhang, Qizhi;
Liu, Liang;
Yuan, Yidong;
Zhang, Zhe;
He, Jiaji;
Gao, Ya;
Li, Yao;
Guo, Xiaolong;
Zhao, Yiqiang

Publication type:

Article

QCA-Based PIPO and SIPO Shift Registers Using Cost-Optimized and Energy-Efficient D Flip Flop.

Published in:

Electronics (2079-9292), 2022, v. 11, n. 19, p. 3237, doi. 10.3390/electronics11193237

By:

Nafees, Naira;
Ahmed, Suhaib;
Kakkar, Vipan;
Bahar, Ali Newaz;
Wahid, Khan A.;
Otsuki, Akira

Publication type:

Article

Observation of a non-Hermitian supersonic mode on a trapped-ion quantum computer.

Published in:

Nature Communications, 2025, v. 16, n. 1, p. 1, doi. 10.1038/s41467-025-57930-3

By:

Zhang, Yuxuan;
Carrasquilla, Juan;
Kim, Yong Baek

Publication type:

Article

Technology mapping oriented to adaptive logic modules.

Published in:

Bulletin of the Polish Academy of Sciences: Technical Sciences, 2019, v. 67, n. 5, p. 947, doi. 10.24425/bpasts.2019.130880

By:

KUBICA, M.;
KANIA, D.

Publication type:

Article

OPTIMIZING THE OPERATION OF CHARGING SELFGENERATING RESONANT INVERTERS.

Published in:

Eastern-European Journal of Enterprise Technologies, 2022, v. 115, n. 5, p. 23, doi. 10.15587/1729-4061.2022.252148

By:

Pavlov, Gennadiy;
Obrubov, Andrey;
Vinnichenko, Irina

Publication type:

Article

Performance comparison of all-optical logic gates using electro-optic effect in MZI-based waveguide switch at 1.46 µm.

Published in:

Journal of Optical Communications, 2023, v. 44, n. 1, p. s231, doi. 10.1515/joc-2020-0125

By:

Kaur, Sehajpal;
Singh, Maninder Lal;
Priyanka;
Singh, Mandeep

Publication type:

Article

Design of One-Bit Magnitude Comparator using Photonic Crystals.

Published in:

Journal of Optical Communications, 2019, v. 40, n. 4, p. 363, doi. 10.1515/joc-2017-0084

By:

Rathi, Sapna;
Swarnakar, Sandip;
Kumar, Santosh

Publication type:

Article

Design of Optical SR Latch and Flip-Flop Using Electro-Optic Effect Inside Lithium–Niobate-Based Mach–Zehnder Interferometers.

Published in:

Journal of Optical Communications, 2019, v. 40, n. 2, p. 119, doi. 10.1515/joc-2017-0053

By:

Pal, Amrindra;
Kumar, Santosh;
Sharma, Sandeep

Publication type:

Article

All-Optical Half-Adder Circuit Based on Beam Interference Principle of Photonic Crystal.

Published in:

Journal of Optical Communications, 2018, v. 39, n. 1, p. 13, doi. 10.1515/joc-2016-0121

By:

Swarnakar, Sandip;
Kumar, Santosh;
Sharma, Sandeep

Publication type:

Article

Scalable recombinase-based gene expression cascades.

Published in:

Nature Communications, 2021, v. 12, n. 1, p. 1, doi. 10.1038/s41467-021-22978-4

By:

Kim, Tackhoon;
Weinberg, Benjamin;
Wong, Wilson;
Lu, Timothy K.

Publication type:

Article

MODELO SEMÂNTICO DE OPERAÇÕES ARITMÉTICAS E LÓGICAS PARA HARDWARE VIRTUAL.

Published in:

Colloquium Exactarum, 2024, v. 16, n. 1, p. 1, doi. 10.5747/ce.2024.v16.e417

By:

dos Santos Santana, Igor Sousa;
Bravo Pariente, César Alberto

Publication type:

Article

ASIC and FPGA Implementation of an Adaptive Convolutional Encoder and Viterbi Decoder.

Published in:

IETE Journal of Research, 2025, v. 71, n. 3, p. 768, doi. 10.1080/03772063.2024.2442035

By:

Kamath, Saksham;
Mundada, Rohit;
Gupta, Naveen;
Sharma, Varun

Publication type:

Article

Design of Reversible Serial Adder Based on EPOE Expressions for Computational Applications.

Published in:

IETE Journal of Research, 2024, v. 70, n. 9, p. 7396, doi. 10.1080/03772063.2024.2353349

By:

Kalantari, Zeinab;
Gerami, Marzieh

Publication type:

Article

Multiple-Controlled Toffoli and Multiple-Controlled Fredkin Reversible Logic Gates-Based Reversible Synchronous Counter Design.

Published in:

IETE Journal of Research, 2024, v. 70, n. 5, p. 5176, doi. 10.1080/03772063.2023.2228747

By:

Binu Siva Singh, S. K.;
Karthikeyan, K. V.

Publication type:

Article

Design of CNTFET-based Ternary Ring and Up–Down Counter Cells.

Published in:

IETE Journal of Research, 2024, v. 70, n. 5, p. 5149, doi. 10.1080/03772063.2023.2225469

By:

Sharma, Trapti;
Sahu, Anil Kumar;
Shekhar, Himanshu;
Shakya, Hemlata

Publication type:

Article

Analysis of 6(4) - Valued Memory.

Published in:

Electronics & Electrical Engineering, 2014, v. 20, n. 6, p. 89, doi. 10.5755/j01.eee.20.6.7274

By:

Guzan, M.

Publication type:

Article

An Investigation of Possibilities of Improving Random Test Generation for Non-scan Sequential Circuits.

Published in:

Electronics & Electrical Engineering, 2011, n. 114, p. 11

By:

Bareisa, E.;
Jusas, V.;
Motiejunas, K.;
Seinauskas, R.

Publication type:

Article

Verification of Initialization Sequences for Sequential Circuits.

Published in:

Electronics & Electrical Engineering, 2011, n. 112, p. 61

By:

Morkunas, K.;
Seinauskas, R.

Publication type:

Article

On Delay Test Generation for Non-scan Sequential Circuits at Functional Level.

Published in:

Electronics & Electrical Engineering, 2011, n. 109, p. 67

By:

Bareisa, E.;
Jusas, V.;
Motiejunas, K.;
Seinauskas, R.

Publication type:

Article

MATLAB-Open Source Tool Based Framework for Test Generation for Digital Circuits Using Evolutionary Algorithms.

Published in:

Journal of Electronic Testing, 2023, v. 39, n. 5/6, p. 555, doi. 10.1007/s10836-023-06088-1

By:

Bhattacharya, Priyajit;
Bhattacharya, Rahul;
Deka, Himasree

Publication type:

Article

Self Healing Controllers to Mitigate SEU in the Control Path of FPGA Based System: A Complete Intrinsic Evolutionary Approach.

Published in:

Journal of Electronic Testing, 2022, v. 38, n. 5, p. 547, doi. 10.1007/s10836-022-06027-6

By:

Deepanjali, S;
Sk, Noor Mahammad

Publication type:

Article

Automated Design Error Debugging of Digital VLSI Circuits.

Published in:

Journal of Electronic Testing, 2022, v. 38, n. 4, p. 395, doi. 10.1007/s10836-022-06020-z

By:

Moness, Mohammed;
Gaber, Lamya;
Hussein, Aziza I.;
Ali, Hanafy M.

Publication type:

Article

Proton Beam Validation of a New Single Event Transient Mitigation Technique.

Published in:

Journal of Electronic Testing, 2020, v. 36, n. 6, p. 785, doi. 10.1007/s10836-020-05917-x

By:

Smith, Farouk

Publication type:

Article

A Parallel Test Application Method towards Power Reduction.

Published in:

Journal of Electronic Testing, 2017, v. 33, n. 2, p. 157, doi. 10.1007/s10836-017-5656-y

By:

Deng, Ding;
Guo, Yang;
Li, Zhentao

Publication type:

Article

Editorial.

Published in:

2015

By:

Agrawal, Vishwani

Publication type:

Editorial

One More Class of Sequential Circuits having Combinational Test Generation Complexity.

Published in:

Journal of Electronic Testing, 2015, v. 31, n. 3, p. 321, doi. 10.1007/s10836-015-5527-3

By:

Das, Debesh;
Fujiwara, Hideo

Publication type:

Article

A Probabilistic Approach to Diagnose SETs in Sequential Circuits.

Published in:

Journal of Electronic Testing, 2013, v. 29, n. 3, p. 317, doi. 10.1007/s10836-013-5361-4

By:

Gangadhar, Sreenivas;
Tragoudas, Spyros

Publication type:

Article

A New Design-for-Testability Method Based on Thru-Testability.

Published in:

Journal of Electronic Testing, 2011, v. 27, n. 5, p. 583, doi. 10.1007/s10836-011-5241-8

By:

Ooi, Chia;
Fujiwara, Hideo

Publication type:

Article

First Steps in Creating Online Testable Reversible Sequential Circuits.

Published in:

VLSI Design, 2018, p. 1, doi. 10.1155/2018/6153274

By:

Khan, Mozammel H. A.;
Rice, Jacqueline E.

Publication type:

Article

New-Age: A Negative Bias Temperature Instability-Estimation Framework for Microarchitectural Components.

Published in:

International Journal of Parallel Programming, 2009, v. 37, n. 4, p. 417, doi. 10.1007/s10766-009-0104-y

By:

DeBole, Michael;
Krishnan, Ramakrishnan;
Balakrishnan, Varsha;
Wenping Wang;
Hong Luo;
Yu Wang;
Yuan Xie;
Yu Cao;
Vijaykrishnan, N.

Publication type:

Article

Comparative Analysis of Self-Controllable Voltage Level (SVL) and Stacking Power Gating Leakage Reduction Techniques Using in Sequential Logic Circuit at 45Nanometer Regime.

Published in:

International Journal on Intelligent Electronics Systems, 2014, v. 8, n. 1, p. 8, doi. 10.18000/ijies.30133

By:

Bhargava, Bhanupriya;
Sharma, Pradeep Kumar;
Akashe, Shyam

Publication type:

Article

Adiabatic technique based low power synchronous counter design.

Published in:

International Journal of Electrical & Computer Engineering (2088-8708), 2023, v. 13, n. 4, p. 3770, doi. 10.11591/ijece.v13i4.pp3770-3777

By:

Sanadhya, Minakshi;
Sharma, Devendra Kumar;
Chyad, Alfilh Raed Hameed

Publication type:

Article

Exploration and Exploitation During Sequential Search.

Published in:

Cognitive Science, 2009, v. 33, n. 3, p. 530, doi. 10.1111/j.1551-6709.2009.01021.x

By:

Dam, Gregory;
Körding, Konrad

Publication type:

Article

ENHANCED CLOCK GATING TECHNIQUE FOR POWER OPTIMIZATION IN SRAM AND SEQUENTIAL CIRCUIT.

Published in:

Journal of Automation, Mobile Robotics & Intelligent Systems, 2021, v. 15, n. 2, p. 32, doi. 10.14313/JAMRIS/2-2021/11

By:

Ashok Kumar, C.;
Madhavi, B. K.;
Lal Kishore, K.

Publication type:

Article

A Novel Simulation Approach for Fault Injection Mechanism Assessing Dependability of Cybersecurity Attacks.

Published in:

Journal of Circuits, Systems & Computers, 2024, v. 33, n. 6, p. 1, doi. 10.1142/S021812662450097X

By:

Kaur, Shaminder;
Sachdeva, Ashish

Publication type:

Article

A Novel Test Pattern Optimization Method Using Recurrent Neural Network.

Published in:

Journal of Circuits, Systems & Computers, 2024, v. 33, n. 4, p. 1, doi. 10.1142/S0218126624500762

By:

Asha Pon, S.;
Jeyalakshmi, V.

Publication type:

Article

QCA-Based Pulse/Bit Sequence Detector Using Low Quantum Cost D-Flip Flop.

Published in:

Journal of Circuits, Systems & Computers, 2023, v. 32, n. 5, p. 1, doi. 10.1142/S0218126623500822

By:

Shaik, Enaul Haq;
Mannava, Balagopendra Rao;
Shaik, Mahaboob Subani;
Rangaswamy, Nakkeeran

Publication type:

Article

Exploiting Energy–Quality (E–Q) Tradeoffs: A Case Study on Color-to-Grayscale Converters with Approximate Design on FPGA.

Published in:

Journal of Circuits, Systems & Computers, 2021, v. 30, n. 04, p. N.PAG, doi. 10.1142/S0218126621500626

By:

Yang, Xiaokun;
Sha, Shi

Publication type:

Article

QCA-Based RAM Design Using a Resilient Reversible Gate with Improved Performance.

Published in:

Journal of Circuits, Systems & Computers, 2020, v. 29, n. 13, p. N.PAG, doi. 10.1142/S0218126620502096

By:

Singh, Rupali;
Sharma, Devendra Kumar

Publication type:

Article

General Method to Design Reversible Universal n-Bit Up/Down Counters.

Published in:

Journal of Circuits, Systems & Computers, 2020, v. 29, n. 10, p. N.PAG, doi. 10.1142/S0218126620501650

By:

Kalantari, Zeinab;
Eshghi, Mohammad;
Mohammadi, Majid;
Jassbi, Somayeh

Publication type:

Article

Low Power Synthesis of Finite State Machines - State Assignment Decomposition Algorithm.

Published in:

Journal of Circuits, Systems & Computers, 2018, v. 27, n. 3, p. -1, doi. 10.1142/S021812661850041X

By:

Kajstura, Krzysztof;
Kania, Dariusz

Publication type:

Article

An Autonomous Clock Gating Technique in Finite State Machines Based on Registers Partitioning.

Published in:

Journal of Circuits, Systems & Computers, 2016, v. 25, n. 5, p. -1, doi. 10.1142/S021812661650033X

By:

Nag, Abhishek;
Pradhan, Sambhu Nath

Publication type:

Article