Works about NETWORKS on a chip

Results: 335

Enhanced overloaded code division multiple access for network on chip.

Published in:

IET Computers & Digital Techniques (Wiley-Blackwell), 2022, v. 16, n. 1, p. 45, doi. 10.1049/cdt2.12039

By:

Vakili, Behnam;
Gholipour, Morteza

Publication type:

Article

Enhanced overloaded code division multiple access for network on chip.

Published in:

IET Computers & Digital Techniques (Wiley-Blackwell), 2022, v. 16, n. 2/3, p. 45, doi. 10.1049/cdt2.12039

By:

Vakili, Behnam;
Gholipour, Morteza

Publication type:

Article

Proline-mediated modulation on DNA repair pathway in rice seedlings under chromium stress by integrating gene chip and co-expression network analysis.

Published in:

Ecotoxicology, 2022, v. 31, n. 8, p. 1266, doi. 10.1007/s10646-022-02586-8

By:

Lin, Yu-Juan;
Feng, Yu-Xi;
Zhang, Qing;
Yu, Xiao-Zhang

Publication type:

Article

Research on Low-Insertion-Loss Packaging Materials for DC-6 GHz Attenuation Chips.

Published in:

Electronics (2079-9292), 2024, v. 13, n. 9, p. 1785, doi. 10.3390/electronics13091785

By:

Wei, Zhijie;
Yu, Shenglin;
Wei, Pengcheng

Publication type:

Article

Spike-Event X-ray Image Classification for 3D-NoC-Based Neuromorphic Pneumonia Detection.

Published in:

Electronics (2079-9292), 2022, v. 11, n. 24, p. 4157, doi. 10.3390/electronics11244157

By:

Wang, Jiangkun;
Ikechukwu, Ogbodo Mark;
Dang, Khanh N.;
Abdallah, Abderazek Ben

Publication type:

Article

Implementation of a Fast Link Rate Adaptation Algorithm for WLAN Systems.

Published in:

Electronics (2079-9292), 2021, v. 10, n. 1, p. 91, doi. 10.3390/electronics10010091

By:

Park, Chester Sungchung;
Park, Sungkyung

Publication type:

Article

Network-Cognitive Traffic Control: A Fluidity-Aware On-Chip Communication.

Published in:

Electronics (2079-9292), 2020, v. 9, n. 10, p. 1667, doi. 10.3390/electronics9101667

By:

Tsai, Wen-Chung;
Chen, Sao-Jie;
Hu, Yu-Hen;
Chiang, Mao-Lun

Publication type:

Article

A Network Adaptive Fault-Tolerant Routing Algorithm for Demanding Latency and Throughput Applications of Network-on-a-Chip Designs.

Published in:

Electronics (2079-9292), 2020, v. 9, n. 7, p. 1076, doi. 10.3390/electronics9071076

By:

Nain, Zulqar;
Ali, Rashid;
Anjum, Sheraz;
Afzal, Muhammad Khalil;
Kim, Sung Won

Publication type:

Article

Improved Ant Colony Algorithm Based on Task Scale in Network on Chip (NoC) Mapping.

Published in:

Electronics (2079-9292), 2020, v. 9, n. 1, p. 6, doi. 10.3390/electronics9010006

By:

Fang, Juan;
Yu, Tingwen;
Wei, Zelin

Publication type:

Article

Delay Bound Optimization in NoC Using a Discrete Firefly Algorithm.

Published in:

Electronics (2079-9292), 2019, v. 8, n. 12, p. 1507, doi. 10.3390/electronics8121507

By:

Du, Gaoming;
Tian, Chao;
Li, Zhenmin;
Zhang, Duoli;
Zhang, Chuan;
Wang, Xiaolei;
Yin, Yongsheng

Publication type:

Article

VLSI DESIGN OF LOW ENERGY MODELING FOR NETWORK ON CHIP (NoC) APPLICATIONS.

Published in:

i-Manager's Journal on Electronics Engineering, 2014, v. 5, n. 1, p. 27, doi. 10.26634/jele.5.1.3320

By:

ANUSHA, JEEVA;
THRIMURTHULU, V.

Publication type:

Article

Multimodal deep learning using on-chip diffractive optics with in situ training capability.

Published in:

Nature Communications, 2024, v. 15, n. 1, p. 1, doi. 10.1038/s41467-024-50677-3

By:

Cheng, Junwei;
Huang, Chaoran;
Zhang, Jialong;
Wu, Bo;
Zhang, Wenkai;
Liu, Xinyu;
Zhang, Jiahui;
Tang, Yiyi;
Zhou, Hailong;
Zhang, Qiming;
Gu, Min;
Dong, Jianji;
Zhang, Xinliang

Publication type:

Article

Mechanisms of Erzhi Pill in Treating Lupus Nephritis Explored by GEO Gene Chips Combined with Network Pharmacology and Molecular Docking.

Published in:

Natural Product Communications, 2024, v. 19, n. 4, p. 1, doi. 10.1177/1934578X241246694

By:

Ru, Xue;
Zhang, Yi;
Chen, Xiaolei;
Sun, Xingqian;
Lv, Honglin;
Fan, Tao

Publication type:

Article

Design of a high speed router for NOC.

Published in:

Modern Physics Letters B, 2021, v. 35, n. 27, p. 1, doi. 10.1142/S0217984921400121

By:

Jiang, Zhanpeng;
Yang, Zhe;
Zhang, Penghui;
Dong, Changchun

Publication type:

Article

A low latency and high efficient three-dimension Network-on-Chip based on hierarchical structure.

Published in:

Modern Physics Letters B, 2017, v. 31, n. 19-21, p. -1, doi. 10.1142/S0217984917400619

By:

Zhu, Chen;
Zhao, Huatao;
Chen, Tinghuan;
Zhu, Tianbo

Publication type:

Article

Static and dynamic task mapping onto network on chip multiprocessors.

Published in:

Dyna (0012-7353), 2014, v. 81, n. 185, p. 28, doi. 10.15446/dyna.v81n185.34867

By:

Bolaños-Martínez, Freddy;
Edison Aedo, José;
Rivera-Vélez, Fredy

Publication type:

Article

Developmental effect of RASopathy mutations on neuronal network activity on a chip.

Published in:

Frontiers in Cellular Neuroscience, 2024, p. 1, doi. 10.3389/fncel.2024.1388409

By:

Weiss, Eva-Maria;
Guhathakurta, Debarpan;
Petrušková, Aneta;
Hundrup, Verena;
Zenker, Martin;
Fejtová, Anna

Publication type:

Article

PAPR reduction scheme with efficient embedded signaling in MIMO-OFDM systems.

Published in:

EURASIP Journal on Wireless Communications & Networking, 2015, v. 2015, n. 1, p. 1, doi. 10.1186/s13638-015-0443-x

By:

Sghaier, Mouna;
Abdelkefi, Fatma;
Siala, Mohamed

Publication type:

Article

Design and Implementation of a Novel Intelligent Strategy for the Permanent Magnet Synchronous Motor Emulation.

Published in:

Complexity, 2022, p. 1, doi. 10.1155/2022/4936167

By:

Zeinoddini-Meymand, Hamed;
Kamel, Salah;
Khan, Baseem

Publication type:

Article

基于RT-YOLO-V5 的芯片外观缺陷检测.

Published in:

Journal of Tiangong University, 2024, v. 43, n. 3, p. 50, doi. 10.3969/j.issn.1671-024x.2024.03.007

By:

郭翠娟;
王妍;
刘净月;
席雨;
徐伟;
王坦

Publication type:

Article

Power-efficient error-resilient network-on-chip router using selective error correction code scheme.

Published in:

Electronics Letters (Wiley-Blackwell), 2018, v. 54, n. 24, p. 1368, doi. 10.1049/el.2018.5389

By:

Li, C.-L.;
Kim, Y.-W.;
Lee, Y. S.;
Han, T. H.

Publication type:

Article

Investigating and Analyzing the Effect of Router Components on Network Performance on the Chip with Regard to Power Consumption.

Published in:

Majlesi Journal of Telecommunication Devices, 2018, v. 7, n. 4, p. 179

By:

Zogh, Farnaz;
Zarandi, Azadeh Alsadat Emrani;
Naeini, Vahid Sattari

Publication type:

Article

类脑神经网络与神经形态器件及其电路综述.

Published in:

Application Research of Computers / Jisuanji Yingyong Yanjiu, 2021, v. 38, n. 8, p. 2241, doi. 10.19734/j.issn.1001-3695.2020.04.0349

By:

邓亚彬;
王志伟;
赵晨晖;
李琳;
贺珊;
李秋红;
帅建伟;
郭东辉

Publication type:

Article

TSGA: 新型的片上网络低功耗映射算法.

Published in:

Application Research of Computers / Jisuanji Yingyong Yanjiu, 2020, v. 37, n. 9, p. 2726, doi. 10.19734/j.issn.1001-3695.2019.04.0138

By:

张保岗;
韩国栋;
刘冬培;
燕籨昊

Publication type:

Article

三维片上网络正四面体裂变拓扑结构研究.

Published in:

Application Research of Computers / Jisuanji Yingyong Yanjiu, 2019, v. 36, n. 1, p. 223, doi. 10.19734/j.issn.1001-3695.2017.08.0888

By:

郑亚振;
张大坤

Publication type:

Article

Design and Implementation of a Network on Chip Using FPGA.

Published in:

Al-Rafadain Engineering Journal, 2013, v. 21, n. 1, p. 91

By:

Jabbar, A. I. A.;
AL Malah, Noor Th.

Publication type:

Article

A Machine Learning Mapping Algorithm for NoC Optimization.

Published in:

Symmetry (20738994), 2023, v. 15, n. 3, p. 593, doi. 10.3390/sym15030593

By:

Weng, Xiaodong;
Liu, Yi;
Xu, Changqing;
Lin, Xiaoling;
Zhan, Linjun;
Wang, Shunyao;
Chen, Dongdong;
Yang, Yintang

Publication type:

Article

Non-Blocking and Multi Wavelength Optical Router Design based on Mach-zehnder Interferometer in 3-D Optical Network on Chip.

Published in:

Majlesi Journal of Electrical Engineering, 2021, v. 15, n. 2, p. 73, doi. 10.52547/mjee.15.2.73

By:

Asadinia, Sanaz;
Mehrabi, Mahdi;
Yaghoubi, Elham

Publication type:

Article

An adaptive intrusion detection and prevention system for Internet of Things.

Published in:

International Journal of Distributed Sensor Networks, 2019, v. 15, n. 11, p. N.PAG, doi. 10.1177/1550147719888109

By:

Bakhsh, Sheikh Tahir;
Alghamdi, Saleh;
Alsemmeari, Rayan A;
Hassan, Syed Raheel

Publication type:

Article

Energy-efficient Hybrid Optical-Electronic Network-on-Chip for Future Many-core Processors.

Published in:

Electronics & Electrical Engineering, 2014, v. 20, n. 3, p. 83, doi. 10.5755/j01.eee.20.3.6682

By:

Weiwei Fu;
Tianzhou Chen;
Li Liu

Publication type:

Article

RCBus: Row-Column Bus Topology for Optical Network-on-Chip.

Published in:

Electronics & Electrical Engineering, 2012, v. 18, n. 8, p. 85, doi. 10.5755/j01.eee.18.8.2633

By:

Weiwei Fu;
Tianzhou Chen

Publication type:

Article

Dynamic low power management technique for decision directed inter-layer communication in three dimensional wireless network on chip.

Published in:

Automatika: Journal for Control, Measurement, Electronics, Computing & Communications, 2023, v. 64, n. 4, p. 1280, doi. 10.1080/00051144.2023.2261088

By:

Dinesh Kumar, T. R.;
Karthikeyan, A.

Publication type:

Article

Proactive flow control using adaptive beam forming for smart intra-layer data communication in wireless network on chip.

Published in:

Automatika: Journal for Control, Measurement, Electronics, Computing & Communications, 2023, v. 64, n. 4, p. 689, doi. 10.1080/00051144.2023.2213927

By:

T.R., Dinesh Kumar;
A., Karthikeyan

Publication type:

Article

Test Technology Newsletter.

Published in:: Journal of Electronic Testing, 2017, v. 33, n. 2, p. 143, doi. 10.1007/s10836-017-5653-1
Publication type:: Article

Editorial.

Published in:

2017

By:

Agrawal, Vishwani

Publication type:

Editorial

A Time-Optimized Scheme Towards Analysis of Channel-Shorts in on-Chip Networks.

Published in:

Journal of Electronic Testing, 2017, v. 33, n. 2, p. 227, doi. 10.1007/s10836-017-5655-z

By:

Bhowmik, Biswajit;
Deka, Jatindra;
Biswas, Santosh

Publication type:

Article

Link Testing: a Survey of Current Trends in Network on Chip.

Published in:

Journal of Electronic Testing, 2017, v. 33, n. 2, p. 209, doi. 10.1007/s10836-017-5646-0

By:

Aghaei, Babak;
Khademzadeh, Ahmad;
Reshadi, Midia;
Badie, Kambiz

Publication type:

Article

A Fault Tolerant Hierarchical Network on Chip Router Architecture.

Published in:

Journal of Electronic Testing, 2013, v. 29, n. 4, p. 485, doi. 10.1007/s10836-013-5398-4

By:

Neishaburi, M. H.;
Zilic, Zeljko

Publication type:

Article

Partial Virtual Channel Sharing: A Generic Methodology to Enhance Resource Management and Fault Tolerance in Networks-on-Chip.

Published in:

Journal of Electronic Testing, 2013, v. 29, n. 3, p. 431, doi. 10.1007/s10836-013-5389-5

By:

Latif, Khalid;
Rahmani, Amir-Mohammad;
Nigussie, Ethiopia;
Seceleanu, Tiberiu;
Radetzki, Martin;
Tenhunen, Hannu

Publication type:

Article

A Region-based Fault-Tolerant Routing Algorithmfor 2D Irregular Mesh Network-on-Chip.

Published in:

Journal of Electronic Testing, 2013, v. 29, n. 3, p. 415, doi. 10.1007/s10836-013-5377-9

By:

Fukushima, Yusuke;
Fukushi, Masaru;
Yairi, Ikuko

Publication type:

Article

Structural Test and Diagnosis for Graceful Degradation of NoC Switches.

Published in:

Journal of Electronic Testing, 2012, v. 28, n. 6, p. 831, doi. 10.1007/s10836-012-5329-9

By:

Dalirsani, Atefe;
Holst, Stefan;
Elm, Melanie;
Wunderlich, Hans-Joachim

Publication type:

Article

A Framework for Scalable TSV Assignment and Selection in Three-Dimensional Networks-on-Chips.

Published in:

VLSI Design, 2017, p. 1, doi. 10.1155/2017/9427678

By:

Charif, Amir;
Coelho, Alexandre;
Zergainoh, Nacer-Eddine;
Nicolaidis, Michael

Publication type:

Article

Design of Smart Power-Saving Architecture for Network on Chip.

Published in:

VLSI Design, 2014, p. 1, doi. 10.1155/2014/531653

By:

Trong-Yen Lee;
Chi-Han Huang

Publication type:

Article

Adaptivity Support for MPSoCs Based on Process Migration in Polyhedral Process Networks.

Published in:

VLSI Design, 2012, p. 1, doi. 10.1155/2012/987209

By:

Cannella, Emanuele;
Derin, Onur;
Meloni, Paolo;
Tuveri, Giuseppe;
Stefanov, Todor

Publication type:

Article

Homogeneous and Heterogeneous MPSoC Architectures with Network-On-Chip Connectivity for Low-Power and Real-Time Multimedia Signal Processing.

Published in:

VLSI Design, 2012, p. 1, doi. 10.1155/2012/450302

By:

Saponara, Sergio;
Fanucci, Luca

Publication type:

Article

A Configurable Hardware Architecture for Runtime Application of Network Calculus.

Published in:

International Journal of Parallel Programming, 2021, v. 49, n. 5, p. 745, doi. 10.1007/s10766-021-00700-7

By:

Hu, Xiao;
Lu, Zhonghai

Publication type:

Article

High Speed Cycle-Approximate Simulation of Embedded Cache-Incoherent and Coherent Chip-Multiprocessors.

Published in:

International Journal of Parallel Programming, 2018, v. 46, n. 6, p. 1247, doi. 10.1007/s10766-018-0566-x

By:

Thompson, Christopher;
Gould, Miles;
Topham, Nigel

Publication type:

Article

The Design of NoC-Side Memory Access Scheduling for Energy-Efficient GPGPUs.

Published in:

International Journal of Parallel Programming, 2018, v. 46, n. 4, p. 722, doi. 10.1007/s10766-017-0521-2

By:

Liu, Wenjie;
Ma, Sheng;
Huang, Libo;
Wang, Zhiying

Publication type:

Article

U niT i: Unified Composition and Time for Multi-domain Model-based Design.

Published in:

International Journal of Parallel Programming, 2013, v. 41, n. 2, p. 261, doi. 10.1007/s10766-012-0226-5

By:

Rovers, Kenneth;
Kuper, Jan

Publication type:

Article

ASIR: Application-Specific Instruction-Set Router for NoC-Based MPSoCs.

Published in:

Computers (2073-431X), 2018, v. 7, n. 3, p. 38, doi. 10.3390/computers7030038

By:

Rettkowski, Jens;
Göhringer, Diana

Publication type:

Article