Works matching DE "NAND gates"

Results: 110

Design and Realization of Novel Dual-Input Logic Gates using Virtual Doped Junctionless Double-Gate TFETs.

Published in:

Journal of Electronic Materials, 2025, v. 54, n. 7, p. 5901, doi. 10.1007/s11664-025-12011-5

By:

Sharma, Arun Kumar;
Kumar, Ritik;
Gopal, Girdhar;
Johar, Arun Kishor;
Varma, Tarun

Publication type:

Article

Manufacturing Reusable NAND Logic Gates and Their Initial Circuits for DNA Nanoprocessors.

Published in:

Chemistry - A European Journal, 2021, v. 27, n. 7, p. 2421, doi. 10.1002/chem.202003959

By:

Molden, Tatiana A.;
Grillo, Marcella C.;
Kolpashchikov, Dmitry M.

Publication type:

Article

The First Step towards a R2R Printing Foundry via a Complementary Design Rule in Physical Dimension for Fabricating Flexible 4‐Bit Code Generator.

Published in:

Advanced Electronic Materials, 2020, v. 6, n. 12, p. 1, doi. 10.1002/aelm.202000770

By:

Park, Hyejin;
Sun, Junfeng;
Jung, Younsu;
Park, Jinhwa;
Maskey, Bijendra Bishow;
Shrestha, Kiran;
Koirala, Gyan Raj;
Parajuli, Sajjan;
Shrestha, Sagar;
Chung, Ahnjung;
Cho, Gyoujin

Publication type:

Article

High-Speed and Cost-Efficient NAND Logic Gate Using a Single SOA-DI Configuration.

Published in:

Photonics, 2024, v. 11, n. 12, p. 1182, doi. 10.3390/photonics11121182

By:

Kotb, Amer;
Hatziefremidis, Antonios;
Said, Gamal;
Zoiros, Kyriakos E.

Publication type:

Article

P.3: 3-D Stacked Complementary TFT Devices using n-type α-IGZO and p-type F8T2 TFTs - Operation Confirmation of NOT and NAND Logic Circuits -.

Published in:

2013

By:

Kimura, Mutsumi;
Hasegawa, Takayuki;
Inoue, Masashi;
Nomura, Kenji;
Kamiya, Toshio;
Hosono, Hideo

Publication type:

Other

Visual Construction of Logical AND and NAND Gates.

Published in:

Journal of Chemistry, 2022, p. 1, doi. 10.1155/2022/1319762

By:

Wang, Xiyuan;
Yin, Zhixiang;
Tang, Zhen;
Yang, Jing;
Cui, Jianzhong;
Xu, Rujie

Publication type:

Article

Monolithic circuits with epitaxial graphene/silicon carbide transistors.

Published in:

Physica Status Solidi - Rapid Research Letters, 2014, v. 8, n. 8, p. 688, doi. 10.1002/pssr.201409171

By:

Hertel, Stefan;
Krieger, Michael;
Weber, Heiko B.

Publication type:

Article

NAND/AND/NOT logic gates response in series of mesoscopic quantum rings.

Published in:

Modern Physics Letters B, 2019, v. 33, n. 34, p. N.PAG, doi. 10.1142/S0217984919504311

By:

Dehghan, E.;
Khoshnoud, D. Sanavi;
Naeimi, A. S.

Publication type:

Article

Realization of all optical silicon slab waveguide based universal logic gates.

Published in:

Optical & Quantum Electronics, 2025, v. 57, n. 4, p. 1, doi. 10.1007/s11082-025-08130-2

By:

Yadav, Yash;
Kalra, Yogita

Publication type:

Article

New structure for an all-optical logic gate based on hybrid plasmonic square-shaped nanoring resonators and strips.

Published in:

Optical & Quantum Electronics, 2022, v. 54, n. 9, p. 1, doi. 10.1007/s11082-022-04018-7

By:

Abdulwahid, Saif H.;
Wadday, Ahmed Ghanim;
Sattar, Sinan M. Abdul

Publication type:

Article

Enhanced all-optical Y-shaped plasmonic OR, NOR and NAND gate models, analyses, and simulation for high speed computations.

Published in:

Optical & Quantum Electronics, 2022, v. 54, n. 6, p. 1, doi. 10.1007/s11082-022-03699-4

By:

Charles, Ipshitha;
Sreevani, Alluru;
Krishna, Sabbi Vamshi;
Swarnakar, Sandip;
Sharma, Prabha Shankar;
Kumar, Santosh

Publication type:

Article

Design and modelling of all-optical NAND gate using metal–insulator–metal (MIM) waveguides-based Mach–Zehnder interferometers for high-speed information processing.

Published in:

Optical & Quantum Electronics, 2021, v. 53, n. 9, p. 1, doi. 10.1007/s11082-021-03153-x

By:

Swarnakar, Sandip;
Reddy, Siva Koti;
Harijan, Ramanand;
Kumar, Santosh

Publication type:

Article

High-performance and ultrafast configurable all-optical photonic crystal logic gates based on interference effects.

Published in:

Optical & Quantum Electronics, 2021, v. 53, n. 5, p. 1, doi. 10.1007/s11082-021-02856-5

By:

Safinezhad, Atefeh;
Babaei Ghoushji, Hadi;
Shiri, Mehrdad;
Rezaei, Mir Hamid

Publication type:

Article

Design and analysis of optical logic gates based on trifurcation structured 2D photonic crystals.

Published in:

Optical & Quantum Electronics, 2020, v. 52, n. 8, p. N.PAG, doi. 10.1007/s11082-020-02489-0

By:

Saranya, D.;
Anbazhagan, Rajesh

Publication type:

Article

Configurable all-optical photonic crystal XOR/AND and XNOR/NAND logic gates.

Published in:

Optical & Quantum Electronics, 2020, v. 52, n. 7, p. 1, doi. 10.1007/s11082-020-02454-x

By:

Rigi, Reyhaneh;
Sharifi, Hojjat;
Navi, Keivan

Publication type:

Article

An investigation on the cascaded operation of photonic crystal based all optical logic gates and verification of De Morgan's law.

Published in:

Optical & Quantum Electronics, 2020, v. 52, n. 6, p. 1, doi. 10.1007/s11082-020-02384-8

By:

Anagha, E. G.;
Jeyachitra, R. K.

Publication type:

Article

Ultra-compact all-optical phase-controlled NAND, OR, XOR, XNOR, and NOT multi-function logic gate.

Published in:

Optical & Quantum Electronics, 2018, v. 50, n. 7, p. 1, doi. 10.1007/s11082-018-1547-4

By:

Farrokhi Chaykandi, Zahra;
Bahrami, Ali;
Mohammadnejad, Shahram

Publication type:

Article

Optimization of ultrafast reverse saturable to saturable absorption transition in Ru dioxolene complex for all-optical logic applications.

Published in:

Optical & Quantum Electronics, 2017, v. 49, n. 1, p. 1, doi. 10.1007/s11082-016-0877-3

By:

Yadav, Chandresh;
Roy, Sukhdev

Publication type:

Article

Mapping granularity and performance tradeoffs for solid state drive.

Published in:

Journal of Supercomputing, 2013, v. 65, n. 2, p. 507, doi. 10.1007/s11227-012-0798-2

By:

Lee, Yangsun;
Barolli, Leonard;
Lim, Seung-Ho

Publication type:

Article

Testing Disturbance Faults in Various NAND Flash Memories.

Published in:

Journal of Electronic Testing, 2014, v. 30, n. 6, p. 643, doi. 10.1007/s10836-014-5487-z

By:

Hou, Chih-Sheng;
Li, Jin-Fu

Publication type:

Article

Band-Gap Solitons in Nonlinear Photonic Crystal Waveguides and Their Application for Functional All-Optical Logic Gating.

Published in:

Photonics, 2021, v. 8, n. 7, p. 250, doi. 10.3390/photonics8070250

By:

Jandieri, Vakhtang;
Khomeriki, Ramaz;
Onoprishvili, Tornike;
Erni, Daniel;
Chotorlishvili, Levan;
Werner, Douglas H.;
Berakdar, Jamal

Publication type:

Article

3D NAND Flash Based on Planar Cells.

Published in:

Computers (2073-431X), 2017, v. 6, n. 4, p. 28, doi. 10.3390/computers6040028

By:

Silvagni, Andrea

Publication type:

Article

Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices.

Published in:

Computers (2073-431X), 2017, v. 6, n. 2, p. 16, doi. 10.3390/computers6020016

By:

Spinelli, Alessandro S.;
Compagnoni, Christian Monzio;
Lacaita, Andrea L.

Publication type:

Article

터널링 전계효과 트랜지스터로 구성된 3차원 적층형 집적회로에 대한 연구.

Published in:

Journal of the Korea Institute of Information & Communication Engineering, 2022, v. 26, n. 5, p. 682, doi. 10.6109/jkiice.2022.26.5.682

By:

유윤섭

Publication type:

Article

Cascadable all-optical NAND gates using diffractive networks.

Published in:

Scientific Reports, 2022, v. 12, n. 1, p. 1, doi. 10.1038/s41598-022-11331-4

By:

Luo, Yi;
Mengu, Deniz;
Ozcan, Aydogan

Publication type:

Article

Program Disturb Research and Error Avoidance Algorithm Design of 3D-TLC NAND Flash Memory.

Published in:

International Journal of Performability Engineering, 2018, v. 14, n. 8, p. 1685, doi. 10.23940/ijpe.18.08.p4.16851694

By:

Xiaoshan Yang;
Ligu Zhu;
Qicong Zhang;
Meng Zhang;
Fei Wu;
Wei Zhang

Publication type:

Article

Quantum Fourier Transform‐Based Arithmetic Logic Unit on a Quantum Processor.

Published in:

Annalen der Physik, 2024, v. 536, n. 4, p. 1, doi. 10.1002/andp.202300457

By:

Çakmak, Selçuk;
Kurt, Murat;
Gençten, Azmi

Publication type:

Article

Distributed computation with continual population growth.

Published in:

Distributed Computing, 2022, v. 35, n. 6, p. 547, doi. 10.1007/s00446-021-00404-8

By:

Cho, Da-Jung;
Függer, Matthias;
Hopper, Corbin;
Kushwaha, Manish;
Nowak, Thomas;
Soubeyran, Quentin

Publication type:

Article

Biologically Plausible Boltzmann Machine.

Published in:

Informatics, 2023, v. 10, n. 3, p. 62, doi. 10.3390/informatics10030062

By:

Berrones-Santos, Arturo;
Bagnoli, Franco

Publication type:

Article

Modeling and Simulation-Based Investigation of 2-D Symmetric Double Gate Dopingless-TFET and Its Circuit Performance for Low-Power Applications.

Published in:

IETE Technical Review, 2022, v. 39, n. 4, p. 838, doi. 10.1080/02564602.2021.1912661

By:

Sharma, Monika;
Narang, Rakhi;
Saxena, Manoj;
Gupta, Mridula

Publication type:

Article

Realization of high-speed logic functions using heterojunction vertical TFET.

Published in:

Applied Physics A: Materials Science & Processing, 2023, v. 129, n. 3, p. 1, doi. 10.1007/s00339-023-06419-1

By:

Ambekar, Vikas;
Panchore, Meena

Publication type:

Article

A Time-Domain Comparator Based Skipping-Window SAR ADC.

Published in:

Computers, Materials & Continua, 2021, v. 69, n. 2, p. 1597, doi. 10.32604/cmc.2021.018502

By:

Liangbo Xie;
Yan Ren;
Mu Zhou;
Xiaolong Yang;
Zhengwen Huang

Publication type:

Article

Design of Reversible Combinational Circuits Using New Reversible Logic Gate.

Published in:

Journal of Engineering Science & Technology Review, 2018, v. 11, n. 5, p. 170, doi. 10.25103/jestr.115.21

By:

Maity, Heranmoy;
Biswas, Arindam;
Bhattacharjee, Anup Kumar;
Pal, Anita

Publication type:

Article

HYBRID MODEL FOR SEQUENTIAL AND COMBINATIONAL CIRCUITS MODELLEDON NEW XOR-XNOR GATES FOR LOW POWER APPLICATIONS.

Published in:

Ilkogretim Online, 2021, v. 20, n. 5, p. 4115, doi. 10.17051/ilkonline.2021.05.451

By:

KAVYA, BOGI;
KAVITHA, T.

Publication type:

Article

Investigating the optical nand gate using plasmonic nano-spheres.

Published in:

Optical & Quantum Electronics, 2015, v. 47, n. 11, p. 3637, doi. 10.1007/s11082-015-0236-9

By:

Rahmanian Koushkaki, Hassan;
Akhlaghi, Majid

Publication type:

Article

Improvement of the bit error rate of a non-coherent OCDMA system for FTTH network applications.

Published in:

Optical & Quantum Electronics, 2013, v. 45, n. 12, p. 1307, doi. 10.1007/s11082-013-9754-5

By:

Ahmed, N.;
Aljunid, S.;
Ahmad, R.;
Fadhil, Hilal

Publication type:

Article

NOR and NAND gates using two photon absorption in silicon wire waveguide.

Published in:

Optical & Quantum Electronics, 2013, v. 45, n. 12, p. 1319, doi. 10.1007/s11082-013-9755-4

By:

Roy Chowdhury, Anirban;
Dutta, Ivy;
Kumbhakar, Dharmadas

Publication type:

Article

Open-loop per-pin skew compensation with lock fault detector for parallel NAND flash memory interface.

Published in:

Electronics Letters (Wiley-Blackwell), 2018, v. 54, n. 6, p. 346, doi. 10.1049/el.2017.4341

By:

Kang, K.-T.;
Kim, S.-Y.;
Lee, K.-Y.

Publication type:

Article

Three-dimensional AND flash memory.

Published in:

Electronics Letters (Wiley-Blackwell), 2017, v. 53, n. 11, p. 739, doi. 10.1049/el.2017.0465

By:

Kim, Y.;
Park, I. H.;
Kwon, H. T.;
Wee, D.;
Park, B.-G.

Publication type:

Article

Memory characteristics of capacitors with poly-GaAs floating gates.

Published in:

Electronics Letters (Wiley-Blackwell), 2016, v. 52, n. 11, p. 963, doi. 10.1049/el.2015.3823

By:

Roh, I. P.;
Kang, N. S.;
Shin, S. H.;
Oh, Y. T.;
Kim, K. B.;
Song, J. D.;
Song, Y. H.

Publication type:

Article

Enhancing internal parallelism of solid-state drives while balancing write loads across dies.

Published in:

Electronics Letters (Wiley-Blackwell), 2015, v. 51, n. 24, p. 1978, doi. 10.1049/el.2015.1840

By:

Winata, Y.;
Kim, S.;
Shin, I.

Publication type:

Article

Single-step glitch-free NAND-based digitally controlled delay lines using dual loops.

Published in:

Electronics Letters (Wiley-Blackwell), 2014, v. 50, n. 13, p. 930, doi. 10.1049/el.2014.0331

By:

Youngjoo Lee;
In-Cheol Park

Publication type:

Article

Effect of field oxide structure on endurance characteristics of NAND flash memory.

Published in:

Electronics Letters (Wiley-Blackwell), 2014, v. 50, n. 10, p. 739, doi. 10.1049/el.2014.0522

By:

Kiyong Kim;
Joongho Yoon;
Yungsam Kim;
Hongsig Kim;
Haebum Lee;
Insoo Cho;
Sangsoo Kim and;
Byoungdeog Choi

Publication type:

Article

Swap time-aware garbage collection policy for NAND flash-based swap system.

Published in:

Electronics Letters (Wiley-Blackwell), 2013, v. 49, n. 24, p. 1, doi. 10.1049/el.2013.2324

By:

M. W. Lin;
S. Y. Chen

Publication type:

Article

Parallel array histogram architecture for embedded implementations.

Published in:

Electronics Letters (Wiley-Blackwell), 2013, v. 49, n. 2, p. 7

By:

Gan, Q.;
Langlois, J. M. P.;
Savaria, Y.

Publication type:

Article

Efficient Pipelined Broadcast with Monitoring Processing Node Status on a Multi-Core Processor.

Published in:

Mathematics (2227-7390), 2019, v. 7, n. 12, p. 1159, doi. 10.3390/math7121159

By:

Park, Jongsu

Publication type:

Article

3D NAND Flash Memory Based on Double-Layer NC-Si Floating Gate with High Density of Multilevel Storage.

Published in:

Nanomaterials (2079-4991), 2022, v. 12, n. 14, p. N.PAG, doi. 10.3390/nano12142459

By:

Yu, Xinyue;
Ma, Zhongyuan;
Shen, Zixiao;
Li, Wei;
Chen, Kunji;
Xu, Jun;
Xu, Ling

Publication type:

Article

Impact of Low-Variability SOTB Process on Ultra-Low-Voltage Operation of 1 Million Logic Gates.

Published in:

Journal of Low Power Electronics & Applications, 2015, v. 5, n. 2, p. 116, doi. 10.3390/jlpea5020116

By:

Yasuhiro Ogasahara;
Tadashi Nakagawa;
Toshihiro Sekigawa;
Hanpei Koike;
Toshiyuki Tsutsumi

Publication type:

Article

Seamlessly fused digital-analogue reconfigurable computing using memristors.

Published in:

Nature Communications, 2018, v. 9, n. 1, p. 1, doi. 10.1038/s41467-018-04624-8

By:

Serb, Alexantrou;
Khiat, Ali;
Prodromakis, Themistoklis

Publication type:

Article

Design Technology of Stacked Type DTMOS.

Published in:

Electronics & Communications in Japan, 2014, v. 97, n. 7, p. 55, doi. 10.1002/ecj.11584

By:

Hiroshima, Yu;
Kodama, Takahiro;
Watanabe, Shigeyoshi

Publication type:

Article