Hierarchy and the Nature of Information.
- Published in:
- Information (2078-2489), 2016, v. 7, n. 1, p. 1, doi. 10.3390/info7010001
- By:
- Publication type:
- Article
Works matching DE "MEMORY hierarchy (Computer science)"
Results: 34
1
2
A Matrix-Matrix Multiplication methodology for single/multi-core architectures using SIMD.
- Published in:
- Journal of Supercomputing, 2014, v. 68, n. 3, p. 1418, doi. 10.1007/s11227-014-1098-9
- By:
- Publication type:
- Article
3
A methodology for speeding up edge and line detection algorithms focusing on memory architecture utilization.
- Published in:
- Journal of Supercomputing, 2014, v. 68, n. 1, p. 459, doi. 10.1007/s11227-013-1049-x
- By:
- Publication type:
- Article
4
Measurement of the latency parameters of the Multi-BSP model: a multicore benchmarking approach.
- Published in:
- Journal of Supercomputing, 2014, v. 67, n. 2, p. 565, doi. 10.1007/s11227-013-1018-4
- By:
- Publication type:
- Article
5
Enhancing GPU parallelism in nature-inspired algorithms.
- Published in:
- Journal of Supercomputing, 2013, v. 63, n. 3, p. 773, doi. 10.1007/s11227-012-0770-1
- By:
- Publication type:
- Article
6
Data locality optimization of interference graphs based on polyhedral computations.
- Published in:
- Journal of Supercomputing, 2012, v. 61, n. 3, p. 935, doi. 10.1007/s11227-011-0660-y
- By:
- Publication type:
- Article
7
Performance analysis and optimization of MPI collective operations on multi-core clusters.
- Published in:
- Journal of Supercomputing, 2012, v. 60, n. 1, p. 141, doi. 10.1007/s11227-009-0296-3
- By:
- Publication type:
- Article
8
Analyzing the execution of sparse matrix-vector product on the Finisterrae SMP-NUMA system.
- Published in:
- Journal of Supercomputing, 2011, v. 58, n. 2, p. 195, doi. 10.1007/s11227-010-0392-4
- By:
- Publication type:
- Article
9
Region-based parallelization of irregular reductions on explicitly managed memory hierarchies.
- Published in:
- Journal of Supercomputing, 2011, v. 56, n. 1, p. 25, doi. 10.1007/s11227-009-0340-3
- By:
- Publication type:
- Article
10
Combating I-O bottleneck using prefetching: model, algorithms, and ramifications.
- Published in:
- Journal of Supercomputing, 2008, v. 45, n. 2, p. 205, doi. 10.1007/s11227-007-0170-0
- By:
- Publication type:
- Article
11
The memory behavior of cache oblivious stencil computations.
- Published in:
- Journal of Supercomputing, 2007, v. 39, n. 2, p. 93, doi. 10.1007/s11227-007-0111-y
- By:
- Publication type:
- Article
12
Distributed Shared Arrays: An Integration of Message Passing and Multithreading on SMP Clusters.
- Published in:
- Journal of Supercomputing, 2005, v. 31, n. 2, p. 161, doi. 10.1007/s11227-005-0041-5
- By:
- Publication type:
- Article
13
Hierarchical Binary Set Partitioning in Cache Memories.
- Published in:
- Journal of Supercomputing, 2005, v. 31, n. 2, p. 185, doi. 10.1007/s11227-005-0106-5
- By:
- Publication type:
- Article
14
AN INTEGRATED SIMULATION INFRASTRUCTURE FOR THE ENTIRE MEMORY HIERARCHY: CACHE , DRAM, NONVOLATI LE MEMORY, AND DISK.
- Published in:
- Intel Technology Journal, 2013, v. 17, n. 1, p. 184
- By:
- Publication type:
- Article
15
Advanced Software Framework, Tools, and Languages for the IXP Family.
- Published in:
- Intel Technology Journal, 2003, v. 7, n. 4, p. 64
- By:
- Publication type:
- Article
16
Methodology for modelling SPMD hybrid parallel computation.
- Published in:
- Concurrency & Computation: Practice & Experience, 2008, v. 20, n. 8, p. 903, doi. 10.1002/cpe.1214
- By:
- Publication type:
- Article
17
Automated and accurate cache behavior analysis for codes with irregular access patterns.
- Published in:
- Concurrency & Computation: Practice & Experience, 2007, v. 19, n. 18, p. 2407, doi. 10.1002/cpe.1173
- By:
- Publication type:
- Article
18
Cache-Oblivious Range Reporting with Optimal Queries Requires Superlinear Space.
- Published in:
- Discrete & Computational Geometry, 2011, v. 45, n. 4, p. 824, doi. 10.1007/s00454-011-9347-7
- By:
- Publication type:
- Article
19
Dual-pivot and beyond: The potential of multiway partitioning in quicksort.
- Published in:
- IT: Information Technology, 2018, v. 60, n. 3, p. 173, doi. 10.1515/itit-2018-0012
- By:
- Publication type:
- Article
20
Infants hierarchically organize memory representations.
- Published in:
- Developmental Science, 2013, v. 16, n. 4, p. 610, doi. 10.1111/desc.12055
- By:
- Publication type:
- Article
21
OPTIMIZATION OF A COMPUTATIONAL FLUID DYNAMICS CODE FOR THE MEMORY HIERARCHY: A CASE STUDY.
- Published in:
- 2010
- By:
- Publication type:
- Case Study
22
SPARSITY: OPTIMIZATION FRAMEWORK FOR SPARSE MATRIX KERNELS.
- Published in:
- International Journal of High Performance Computing Applications, 2004, v. 18, n. 1, p. 135, doi. 10.1177/1094342004041296
- By:
- Publication type:
- Article
23
Reliability Increasing Method Using a SEC-DED Hsiao Code to Cache Memories, Implemented with FPGA Circuits.
- Published in:
- Journal of Computer Science & Control Systems, 2011, v. 4, n. 2, p. 59
- By:
- Publication type:
- Article
24
Aspects of Cache Memory Simulation using Programs under Windows and UNIX Operating Systems.
- Published in:
- Journal of Computer Science & Control Systems, 2011, v. 4, n. 2, p. 55
- By:
- Publication type:
- Article
25
Hierarchical Menu Selection with a Body-Centered Remote Interface.
- Published in:
- Interacting with Computers, 2014, v. 26, n. 5, p. 389, doi. 10.1093/iwc/iwt043
- By:
- Publication type:
- Article
26
EXPLOITING THE MEMORY HIERARCHY OF MULTICORE SYSTEMS FOR PARALLEL TRIANGULATION REFINEMENT.
- Published in:
- Parallel Processing Letters, 2012, v. 22, n. 3, p. 1250007-1
- By:
- Publication type:
- Article
27
CUDA Memory Optimizations for Large Data-Structures in the Gravit Simulator.
- Published in:
- Journal of Algorithms & Computational Technology, 2011, v. 5, n. 2, p. 341, doi. 10.1260/1748-3018.5.2.341
- By:
- Publication type:
- Article
28
MNEME: A memory hierarchy simulator for an engineering computer architecture course.
- Published in:
- Computer Applications in Engineering Education, 2011, v. 19, n. 2, p. 358, doi. 10.1002/cae.20317
- By:
- Publication type:
- Article
29
The Design of the PROMIS Compiler—Towards Multi-Level Parallelization.
- Published in:
- International Journal of Parallel Programming, 2000, v. 28, n. 2, p. 195, doi. 10.1023/A:1007500300397
- By:
- Publication type:
- Article
30
Investigation of the Performance of Modified TCM Scheme for the Protection of SPIHT-Based Compressed Images Over Fading Channel.
- Published in:
- International Review on Computers & Software, 2013, v. 8, n. 1, p. 271
- By:
- Publication type:
- Article
31
Keep up with clinical studies.
- Published in:
- Family Practice Management, 2006, v. 13, n. 8, p. 83
- By:
- Publication type:
- Article
32
RESOURCE STORAGE MANAGEMENT MODEL FOR ENSURING QUALITY OF SERVICE IN THE CLOUD ARCHIVE SYSTEMS.
- Published in:
- Computer Science, 2014, v. 15, n. 1, p. 3, doi. 10.7494/csci.2014.15.1.3
- By:
- Publication type:
- Article
33
GPU based techniques for deep image merging.
- Published in:
- Computational Visual Media, 2018, v. 4, n. 3, p. 277, doi. 10.1007/s41095-018-0118-8
- By:
- Publication type:
- Article
34
Data Classification Management with its Interfacing Structure for Hybrid SLC/MLC PRAM Main Memory.
- Published in:
- Computer Journal, 2015, v. 58, n. 11, p. 2852, doi. 10.1093/comjnl/bxu133
- By:
- Publication type:
- Article