Works matching DE "LOGIC circuits"

Results: 2300

Effect of Negative Control Lines on the Exact Synthesis of Reversible Circuits.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2013, v. 21, n. 5-6, p. 627

By:

WILLE, ROBERT;
SOEKEN, MATHIAS;
PRZIGODA, NILS;
DRECHSLER, ROLF

Publication type:

Article

Toffoli Gate Implementation Using The Billiard Ball Model.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2012, v. 19, n. 1-3, p. 133

By:

HOSSEINI, HADI;
DUECK, GERHARD W.

Publication type:

Article

On Evolutionary Synthesis of Compact Polymorphic Combinational Circuits.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2011, v. 17, n. 5-6, p. 607

By:

Gajda, Zbyšek;
Sekanina, Lukáš

Publication type:

Article

QDD Based Method of Automatic Circuit Design for Xilinx Virtex-5 FPGA Devices.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2009, v. 15, n. 5-6, p. 547

By:

Stanković, Stanislav;
Astola, Jaakko

Publication type:

Article

Multiple-Valued Reversible Logic Circuits.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2009, v. 15, n. 5-6, p. 489

By:

De Vos, Alexis;
Van Rentergem, Yvan

Publication type:

Article

Exact Synthesis of Elementary Quantum Gate Circuits.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2009, v. 15, n. 4, p. 283

By:

Große, Daniel;
Wille, Robert;
Dueck, Gerhard W.;
Drechsler, Rolf

Publication type:

Article

A Novel Design Approach of Boolean Functions with 2-input Universal NAND Gates using μ-graph Method.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2008, v. 14, n. 1-2, p. 177

By:

Bhattacharyya, Malay;
Bhattacharyya, Manas

Publication type:

Article

Design For Testability of QCA Logic under Stuck-at-value Fault Model.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2008, v. 14, n. 1-2, p. 145

By:

Sultana, Sayeeda;
Al-Imam, Shahriar;
Radecka, Katarzyna

Publication type:

Article

Low-Power Multiple-Valued Reconfigurable VLSI Using Series-Gating Differential-Pair Circuits.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2007, v. 13, n. 4-6, p. 619

By:

Okada, Nobuaki;
Kameyama, Michitaka

Publication type:

Article

The Genetic Code as a Function of Multiple-Valued Logic Over the Field of Complex Numbers and its Learning using Multilayer Neural Network Based on Multi-Valued Neurons.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2007, v. 13, n. 4-6, p. 605

By:

Aizenberg, Igor;
Moraga, Claudio

Publication type:

Article

GF(4) Based Synthesis of Quaternary Reversible/Quantum Logic Circuits.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2007, v. 13, n. 4-6, p. 583

By:

Khan, Mozammel H. A.;
Perkowski, Marek A.

Publication type:

Article

Universal VLSI Based on a Redundant Multiple-Valued Sequential Logic Operation.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2007, v. 13, n. 4-6, p. 553

By:

Ito, Tatsuku;
Kameyama, Michitaka

Publication type:

Article

QMDD Minimization using Sifting for Variable Reordering.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2007, v. 13, n. 4-6, p. 537

By:

Miller, D. Michael;
Feinstein, David Y.;
Thrornton, Mitchell A.

Publication type:

Article

Design Methods for Binary to Decimal Converters Using Arithmetic Decompositions.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2007, v. 13, n. 4-6, p. 503

By:

Iguchi, Yukihiro;
Sasao, Tsutomu;
Matsuura, Munehiro

Publication type:

Article

Design of Multiple-valued Arithmetic Circuits Using Counter Tree Diagrams.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2007, v. 13, n. 4-6, p. 487

By:

Homma, Naofumi;
Degawa, Katsuhiko;
Aoki, Takafumi;
Higuchi, Tatsuo

Publication type:

Article

Interpretations of the Sampling Theorem in Multiple-Valued Logic.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2007, v. 13, n. 4-6, p. 467

By:

Stanković, Radomir S.;
Astola, Jaakko T.

Publication type:

Article

Multiple-Valued Logic Circuits Design using Negative Differential Resistance Devices.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2007, v. 13, n. 4-6, p. 447

By:

Berezowski, Krzysztof S.;
Vrudhula, Sarma B. K.

Publication type:

Article

Multiple Path Switching Device Utilizing Size-Controlled Nano-Schottky Wrap Gates for MDD-Based Logic Circuits.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2007, v. 13, n. 3, p. 267

By:

Kasia, Seiya;
Nakamura, Tatsuya;
Shiratori, Yuta

Publication type:

Article

Design of a Two-Bit-Per-Cell Content-Addressable Memory Using Single-Electron Transistors.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2007, v. 13, n. 3, p. 249

By:

Degawa, Katsuhiko;
Aoki, Takafumi;
Higuchi, Tatsuo;
Inokawa, Hiroshi;
Takahashi, Yasou

Publication type:

Article

Synthesis of Quantum Multiple-Valued Circuits.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2006, v. 12, n. 5-6, p. 431

By:

Miller, D. Michael;
Maslov, Dmitri;
Dueck, Gerhard W.

Publication type:

Article

On University of General Reversible Multiple-Valued Logic Gates.

Published in:

Journal of Multiple-Valued Logic & Soft Computing, 2006, v. 12, n. 5-6, p. 417

By:

Kerntopf, Pawel;
Perkowski, Marek;
Khan, Mozammel H.

Publication type:

Article

A Skew-Window based Methodology for Timing Fixing in Multiple Power Modes.

Published in:

Journal of Information Science & Engineering, 2015, v. 31, n. 5, p. 1795

By:

WEI-KAI CHENG;
PO-HAN WU;
YI-HSUAN CHIU

Publication type:

Article

A Network Representation of First-Order Logic That Uses Token Evolution for Inference.

Published in:

Journal of Information Science & Engineering, 2014, v. 30, n. 3, p. 669

By:

HIDEAKI SUZUKI;
MIKIO YOSHIDA;
HIDEFUMI SAWAI

Publication type:

Article

CoCEC: An Automatic Combinational Circuit Equivalence Checker Based on the Interactive Theorem Prover.

Published in:

Complexity, 2021, p. 1, doi. 10.1155/2021/5525539

By:

Khan, Wilayat;
Khan, Farrukh Aslam;
Derhab, Abdelouahid;
Alhudhaif, Adi

Publication type:

Article

Facile Fabrication of Multiresponsive Self‐Healing Hydrogels with Logic‐Gate Responses.

Published in:

Macromolecular Chemistry & Physics, 2021, v. 222, n. 2, p. 1, doi. 10.1002/macp.202000339

By:

Pei, Xiaoyue;
Fang, Liping;
Chen, Weiping;
Wen, Xin;
Bai, Libin;
Ba, Xinwu

Publication type:

Article

Nanosheet transistors: materials, devices, systems and applications.

Published in:

Journal of Materials Science, 2025, v. 60, n. 16, p. 6769, doi. 10.1007/s10853-025-10827-4

By:

Angelin Delighta, A.;
Raj Kumar, J. S.;
Binola K Jebalin, I. V.;
Nirmal, D.

Publication type:

Article

A valences-totaling model for English sentiment classification.

Published in:

Knowledge & Information Systems, 2017, v. 53, n. 3, p. 579, doi. 10.1007/s10115-017-1054-0

By:

Phu, Vo;
Chau, Vo;
Dat, Nguyen;
Tran, Vo;
Nguyen, Tuan

Publication type:

Article

Exploiting structure in LTL synthesis.

Published in:

International Journal on Software Tools for Technology Transfer, 2013, v. 15, n. 5/6, p. 541, doi. 10.1007/s10009-012-0222-5

By:

Filiot, Emmanuel;
Jin, Naiyong;
Raskin, Jean-François

Publication type:

Article

Engineering the Stability of Nanozyme-Catalyzed Product for Colorimetric Logic Gate Operations.

Published in:

Molecules, 2021, v. 26, n. 21, p. 6494, doi. 10.3390/molecules26216494

By:

Fu, Lianlian;
Yu, Deshuai;
Zou, Dijuan;
Qian, Hao;
Lin, Youhui

Publication type:

Article

Visual Detection of Triethylamine and a Dual Input/Output Logic Gate Based on a Eu 3+ -Complex.

Published in:

Molecules, 2021, v. 26, n. 11, p. 3244, doi. 10.3390/molecules26113244

By:

Li, Bao-Ning;
Liu, Yuan-Yuan;
Wang, Ya-Ping;
Pan, Mei

Publication type:

Article

Constructing Controllable Logic Circuits Based on DNAzyme Activity.

Published in:

Molecules, 2019, v. 24, n. 22, p. 4134, doi. 10.3390/molecules24224134

By:

Yang, Fengjie;
Liu, Yuan;
Wang, Bin;
Zhou, Changjun;
Zhang, Qiang

Publication type:

Article

8-Bit Adder and Subtractor with Domain Label Based on DNA Strand Displacement.

Published in:

Molecules, 2018, v. 23, n. 11, p. 2989, doi. 10.3390/molecules23112989

By:

Han, Weixuan;
Zhou, Changjun;
Zeng, Xiangxiang

Publication type:

Article

D-VASim: an interactive virtual laboratory environment for the simulation and analysis of genetic circuits.

Published in:

Bioinformatics, 2017, v. 33, n. 2, p. 297, doi. 10.1093/bioinformatics/btw592

By:

Baig, Hasan;
Madsen, Jan

Publication type:

Article

Experimental design schemes for learning Boolean network models.

Published in:

Bioinformatics, 2014, v. 30, n. 17, p. i445, doi. 10.1093/bioinformatics/btu451

By:

Atias, Nir;
Gershenzon, Michal;
Labazin, Katia;
Sharan, Roded

Publication type:

Article

A rate-distortion theory for gene regulatory networks and its application to logic gate consistency.

Published in:

Bioinformatics, 2013, v. 29, n. 9, p. 1166, doi. 10.1093/bioinformatics/btt116

By:

Facchetti, Giuseppe;
Iacono, Giovanni;
De Palo, Giovanna;
Altafini, Claudio

Publication type:

Article

Architecture of Molecular Logic Gates: From Design to Application as Optical Detection Devices.

Published in:

Organics, 2024, v. 5, n. 2, p. 114, doi. 10.3390/org5020008

By:

Dias, Gleiston G.;
Souto, Francielly T.

Publication type:

Article

新型二芳基乙烯材料的离子调控光致变色性能研究.

Published in:

Applied Chemical Industry, 2023, v. 52, n. 7, p. 1991

By:

王晨晨;
苟丽珍;
辛志玲;
邹祺

Publication type:

Article

Source switching circuit with low-gate-driving loss in high-voltage buck light emitting diode driver.

Published in:

IET Power Electronics (Wiley-Blackwell), 2013, v. 6, n. 4, p. 663, doi. 10.1049/iet-pel.2012.0495

By:

Tse-Ju Liao;
Chia-Chieh Hung;
Chern-Lin Chen

Publication type:

Article

Plasmonic wideband GST‐based switch in the near‐infrared region.

Published in:

IET Optoelectronics (Wiley-Blackwell), 2022, v. 16, n. 5, p. 201, doi. 10.1049/ote2.12073

By:

Heidari, Saman;
Nozhat, Najmeh

Publication type:

Article

Implementation of all‐optical Toffoli gate by 2D Si–air photonic crystal.

Published in:

IET Optoelectronics (Wiley-Blackwell), 2021, v. 15, n. 3, p. 139, doi. 10.1049/ote2.12029

By:

De, Paromita;
Ranwa, Sapana;
Mukhopadhyay, Sourangshu

Publication type:

Article

All-optical NOT and XOR logic gates using photonic crystal nano-resonator and based on an interference effect.

Published in:

IET Optoelectronics (Wiley-Blackwell), 2018, v. 12, n. 4, p. 191, doi. 10.1049/iet-opt.2017.0174

By:

Mohebzadeh-Bahabady, Ahmad;
Olyaee, Saeed

Publication type:

Article

Implementation of all-optical Pauli-Y gate by the integrated phase and polarisation encoding.

Published in:

IET Optoelectronics (Wiley-Blackwell), 2018, v. 12, n. 4, p. 176, doi. 10.1049/iet-opt.2017.0138

By:

Dey, Shuvra;
Mukhopadhyay, Sourangshu

Publication type:

Article

Cascaded versus parallel architectures of two-stage optical crossbar switches with an extra set of inputs and outputs.

Published in:

IET Optoelectronics (Wiley-Blackwell), 2018, v. 12, n. 4, p. 196, doi. 10.1049/iet-opt.2017.0096

By:

Hitoshi Obara

Publication type:

Article

Photonic processing of all‐optical Johnson counter using semiconductor optical amplifiers.

Published in:

IET Optoelectronics (Wiley-Blackwell), 2017, v. 11, n. 1, p. 8, doi. 10.1049/iet-opt.2015.0106

By:

Singh, Simranjit;
Kaur, Simarpreet;
Kaur, Ramandeep;
Kaler, Rajinder Singh

Publication type:

Article

All‐optical 2's complement number conversion scheme without binary addition.

Published in:

IET Optoelectronics (Wiley-Blackwell), 2017, v. 11, n. 1, p. 1, doi. 10.1049/iet-opt.2015.0087

By:

Chattopadhyay, Tanay;
Gayen, Dilip Kumar

Publication type:

Article

Compact photonic crystal integrated circuit for all-optical logic operation.

Published in:

IET Optoelectronics (Wiley-Blackwell), 2016, v. 10, n. 4, p. 142, doi. 10.1049/iet-opt.2015.0072

By:

Xavier, Susan Christina;
Carolin, B. Elizebeth;
Kabilan, Arunachalam P.;
Johnson, William

Publication type:

Article

Optical data shifting using polarisation properties of light.

Published in:

IET Optoelectronics (Wiley-Blackwell), 2015, v. 9, n. 6, p. 283, doi. 10.1049/iet-opt.2014.0096

By:

Chattopadhyay, Tanay

Publication type:

Article

First principle approach towards logic design using hydrogen-doped single-strand DNA.

Published in:

IET Nanobiotechnology (Wiley-Blackwell), 2019, v. 13, n. 1, p. 77, doi. 10.1049/iet-nbt.2018.5027

By:

Roy, Pradipta;
Dey, Debarati;
De, Debashis

Publication type:

Article

Design of binary subtractor using actin quantum cellular automata.

Published in:

IET Nanobiotechnology (Wiley-Blackwell), 2018, v. 12, n. 1, p. 32, doi. 10.1049/iet-nbt.2017.0149

By:

Sadhu, Tapatosh;
Das, Biplab;
De, Debashis;
Das, Jadav Chandra

Publication type:

Article

Analyzing Fully Depleted SOI NC‐MOSFET for Enhanced Bio‐Sensor and Digital Circuit Applications.

Published in:

IET Circuits, Devices & Systems (Wiley-Blackwell), 2025, v. 2025, p. 1, doi. 10.1049/cds2/5585625

By:

Kumar, Vydha Pradeep;
Panda, Deepak Kumar;
Kumar, Aruru Sai;
Reddy, B. Naresh Kumar;
Reddy, Ch. Rama Prakasha;
Bandyopadhyay, Supriyo

Publication type:

Article