Works matching DE "FLOATING-point arithmetic"
Results: 232
"Pure" or "Numerical" Jordan Form?
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- International Journal Bioautomation, 2024, v. 28, n. 4, p. 267, doi. 10.7546/ijba.2024.28.4.001039
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An efficient iterative pseudo point elimination technique to represent the shape of the digital image boundary.
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- Multimedia Tools & Applications, 2024, v. 83, n. 38, p. 85899, doi. 10.1007/s11042-024-20183-1
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An efficient iterative pseudo point elimination technique to represent the shape of the digital image boundary.
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- Multimedia Tools & Applications, 2024, v. 83, n. 36, p. 85899, doi. 10.1007/s11042-024-20183-1
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Various pseudo random number generators based on memristive chaos map model.
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- Multimedia Tools & Applications, 2024, v. 83, n. 21, p. 59561, doi. 10.1007/s11042-023-17863-9
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An 8-bit precision cipher for fast image encryption.
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- Multimedia Tools & Applications, 2022, v. 81, n. 23, p. 34027, doi. 10.1007/s11042-022-12368-3
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An 8-bit precision cipher for fast image encryption.
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- Multimedia Tools & Applications, 2022, v. 81, n. 22, p. 34027, doi. 10.1007/s11042-022-12368-3
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- Article
Reliable low precision simulations in land surface models.
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- Climate Dynamics, 2018, v. 51, n. 7/8, p. 2657, doi. 10.1007/s00382-017-4034-x
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The reliability of single precision computations in the simulation of deep soil heat diffusion in a land surface model.
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- Climate Dynamics, 2016, v. 46, n. 11/12, p. 3865, doi. 10.1007/s00382-015-2809-5
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Computing Line Intersections.
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- International Journal of Image & Graphics, 2001, v. 1, n. 2, p. 217, doi. 10.1142/S0219467801000141
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Design of area-efficient IIR filter using FPPE.
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- Turkish Journal of Electrical Engineering & Computer Sciences, 2019, v. 27, n. 3, p. 2321, doi. 10.3906/elk-1705-394
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- Article
High-Performance Physical Simulations on Next-Generation Architecture with Many Cores.
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- Intel Technology Journal, 2007, v. 11, n. 3, p. 1, doi. 10.1535/itj.1103.08
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Computational Insights into the Unstable Fixed Point of the Fractional Difference Logistic Map.
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- Mathematics (2227-7390), 2024, v. 12, n. 23, p. 3635, doi. 10.3390/math12233635
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Roots of Characteristic Polynomial Sequences in Iterative Block Cyclic Reductions.
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- Mathematics (2227-7390), 2021, v. 9, n. 24, p. 3213, doi. 10.3390/math9243213
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- Article
Development of Radix-Independent Floating-Point Arithmetic for IEEE 854 Standard.
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- International Transactions in Applied Sciences, 2011, v. 3, n. 3, p. 387
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- Article
TomocuPy - efficient GPU-based tomographic reconstruction with asynchronous data processing.
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- Journal of Synchrotron Radiation, 2023, v. 30, n. 1, p. 179, doi. 10.1107/S1600577522010311
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Exploiting Binary Floating-Point Representations for Constraint Propagation.
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- INFORMS Journal on Computing, 2016, v. 28, n. 1, p. 31, doi. 10.1287/ijoc.2015.0663
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Unrealistic models for realistic computations: how idealisations help represent mathematical structures and found scientific computing.
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- Synthese, 2021, v. 199, n. 1/2, p. 249, doi. 10.1007/s11229-020-02654-8
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A Low Power Design of Single Precision Floating Point Multiplier for Computing Techniques.
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- International Review on Computers & Software, 2013, v. 8, n. 7, p. 1522
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- Article
JPEG2000 Compatible Lossless Coding of Floating-Point Data.
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- EURASIP Journal on Image & Video Processing, 2007, v. 2007, p. 1, doi. 10.1155/2007/85385
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Machine Coded Genetic Algorithms For Real Parameter Optimization Problems.
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- Gazi University Journal of Science, 2013, v. 26, n. 1, p. 85
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IBM's Super Duo.
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- Bio-IT World, 2004, v. 3, n. 7, p. 1
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Fast and low‐power leading‐one detectors for energy‐efficient logarithmic computing.
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- IET Computers & Digital Techniques (Wiley-Blackwell), 2021, v. 15, n. 4, p. 241, doi. 10.1049/cdt2.12019
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FPGA‐based implementation of floating point processing element for the design of efficient FIR filters.
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- IET Computers & Digital Techniques (Wiley-Blackwell), 2021, v. 15, n. 4, p. 296, doi. 10.1049/cdt2.12010
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- Article
Exact image representation via a number-theoretic Radon transform.
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- IET Computer Vision (Wiley-Blackwell), 2014, v. 8, n. 4, p. 338, doi. 10.1049/iet-cvi.2013.0101
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- Article
Advanced Phase Estimation and Design for Next-Generation Radar Systems: A Digital Approach.
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- Traitement du Signal, 2024, v. 41, n. 2, p. 827, doi. 10.18280/ts.410223
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Efficient Cached 64 Point FFT Processor Using Floating Point Arithmetic for OFDM Application.
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- Instrumentation, Mesures, Métrologies, 2022, v. 21, n. 1, p. 21, doi. 10.18280/i2m.210104
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- Article
디지털 능동배열레이다의 빔형성을위한고정소수점기반빔형성계수 연산기 설계 및성능분석.
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- Journal of Korean Institute of Electromagnetic Engineering & Science / Han-Guk Jeonjapa Hakoe Nonmunji, 2023, v. 34, n. 12, p. 918, doi. 10.5515/KJKIEES.2023.34.12.918
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A DESIGN AND IMPLEMENTATION OF HIGH SPEED IEEE-754 DOUBLE PRECISION FLOATING POINT UNIT BASED ON VEDIC TECHNIQUES.
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- i-Manager's Journal on Electronics Engineering, 2017, v. 8, n. 1, p. 19, doi. 10.26634/jele.8.1.13836
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AN EFFICIENT ARCHITECTURE FOR SINGLE PRECISION FLOATING POINT MULTIPLIER USING VARIOUS ALGORITHMS.
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- i-Manager's Journal on Electronics Engineering, 2015, v. 5, n. 3, p. 11, doi. 10.26634/jele.5.3.3393
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A Secure Private Key Encryption Technique For Data Security in Modern Cryptosystem.
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- BVICAM's International Journal of Information Technology, 2010, v. 2, n. 2, p. 51
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Decimal CORDIC Rotation based on Selection by Rounding: Algorithm and Architecture.
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- Computer Journal, 2011, v. 54, n. 11, p. 1798, doi. 10.1093/comjnl/bxr012
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Verifying a Synthesized Implementation of IEEE-754 Floating-Point Exponential Function using HOL.
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- Computer Journal, 2010, v. 53, n. 4, p. 465, doi. 10.1093/comjnl/bxp023
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- Article
An Electrical Circuit and Computer System Analogy.
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- Computer Journal, 1997, v. 40, n. 7, p. 457, doi. 10.1093/comjnl/40.7.457
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- Article
EFFICIENT VQ-BASED SPEAKER IDENTIFICATION THROUGH ELIMINATION OF ANOMALOUS VECTORS DURING MFCC FEATURE EXTRACTION.
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- Pakistan Journal of Science, 2014, v. 66, n. 1, p. 36
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Experimenting with Visualization on Desktop Grids.
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- Petroleum - Gas University of Ploiesti Bulletin, Technical Series, 2009, v. 61, n. 3, p. 255
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Analysis of Fast Radix-10 Digit Recurrence Algorithms for Fixed-Point and Floating-Point Dividers on FPGAs.
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- International Journal of Reconfigurable Computing, 2013, p. 1, doi. 10.1155/2013/453173
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A Vector-Like Reconfigurable Floating-Point Unit for the Logarithm.
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- International Journal of Reconfigurable Computing, 2011, p. 1, doi. 10.1155/2011/341510
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- Article
The Coarse-Grained/Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units.
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- International Journal of Reconfigurable Computing, 2008, p. 1, doi. 10.1155/2008/736203
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Overview of Parallel Platforms for Common High Performance Computing.
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- Radioengineering, 2012, v. 21, n. 1, p. 436
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- Article
Overcoming the challenges of porting OpenCV to TI's embedded ARM + DSP platforms.
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- International Journal of Electrical Engineering Education, 2012, v. 49, n. 3, p. 260, doi. 10.7227/IJEEE.49.3.6
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- Article
Verified Numerical Computations for Large-Scale Linear Systems.
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- Applications of Mathematics, 2021, v. 66, n. 2, p. 269, doi. 10.21136/AM.2021.0318-19
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- Article
A new math library.
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- International Journal of Quantum Chemistry, 2009, v. 109, n. 13, p. 3008, doi. 10.1002/qua.22266
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Generating Unit Tests for Floating Point Embedded Software using Compositional Dynamic Symbolic Execution.
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- Electronics & Electrical Engineering, 2012, n. 122, p. 19
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- Article
Vibration compensation of delta 3D printer with position-varying dynamics using filtered B-splines.
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- International Journal of Advanced Manufacturing Technology, 2023, v. 125, n. 5/6, p. 2851, doi. 10.1007/s00170-022-10789-w
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- Article
Application of Fixed Point Turbo Decoding Algorithm for Throughput Enhancement of SISO Parallel Advanced LTE Turbo Decoders.
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- International Journal of Intelligent Engineering & Systems, 2017, v. 10, n. 5, p. 247, doi. 10.22266/ijies2017.1031.27
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- Article
An Effective Implementation of Dual Path Fused Floating-Point Add-Subtract Unit for Reconfigurable Architectures.
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- International Journal of Intelligent Engineering & Systems, 2017, v. 10, n. 2, p. 40, doi. 10.22266/ijies2017.0430.05
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- Article
A High-Speed and Low-Energy-Consumption Processor for SVD-MIMO-OFDM Systems.
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- VLSI Design, 2013, p. 1, doi. 10.1155/2013/625019
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- Article
ASIC Design of Butterfly Unit Based on Non-Redundant and Redundant Algorithm.
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- Iranian Journal of Electrical & Electronic Engineering, 2021, v. 17, n. 1, p. 1, doi. 10.22068/IJEEE.17.1.1809
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Material to system-level benchmarking of CMOS-integrated RRAM with ultra-fast switching for low power on-chip learning.
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- Scientific Reports, 2023, v. 13, n. 1, p. 1, doi. 10.1038/s41598-023-42214-x
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- Article
Material to system-level benchmarking of CMOS-integrated RRAM with ultra-fast switching for low power on-chip learning.
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- Scientific Reports, 2023, v. 13, n. 1, p. 1, doi. 10.1038/s41598-023-42214-x
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- Article