Works matching DE "FIELD programmable gate arrays testing"
Results: 5
Chaos triggered image encryption - a reconfigurable security solution.
- Published in:
- Multimedia Tools & Applications, 2018, v. 77, n. 10, p. 11669, doi. 10.1007/s11042-017-4811-x
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- Article
FAS: Using FPGA to Accelerate and Secure SDN Software Switches.
- Published in:
- Security & Communication Networks, 2018, p. 1, doi. 10.1155/2018/5650205
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- Article
A Routability-Aware Algorithm for Both Global and Local Interconnect Resource Test and Diagnosis of Xilinx SRAM-FPGAs.
- Published in:
- Journal of Electronic Testing, 2016, v. 32, n. 6, p. 749, doi. 10.1007/s10836-016-5622-0
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- Article
A Shift-Register Based BIST Architecture for FPGA Global Interconnect Testing and Diagnosis.
- Published in:
- Journal of Electronic Testing, 2015, v. 31, n. 2, p. 207, doi. 10.1007/s10836-015-5515-7
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- Publication type:
- Article
Three-Level Management Algorithm to Increase the SEU Emulation Rate in DPR Based Emulators.
- Published in:
- Journal of Electronic Testing, 2014, v. 30, n. 6, p. 739, doi. 10.1007/s10836-014-5489-x
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- Article