Watermarking Hardware Based on Wavelet Coefficients Quantization Method.
- Published in:
- Circuits, Systems & Signal Processing, 2013, v. 32, n. 6, p. 2559, doi. 10.1007/s00034-013-9550-2
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- Publication type:
- Article
Works matching DE "DESIGN %26 construction of very large scale circuit integration"
Results: 20
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Architecture of Generalized Bit-Flipping Decoding for High-Rate Non-binary LDPC Codes.
- Published in:
- Circuits, Systems & Signal Processing, 2013, v. 32, n. 2, p. 727, doi. 10.1007/s00034-012-9481-3
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- Publication type:
- Article
3
DLPA: Discrepant Low PDP 8-Bit Adder.
- Published in:
- Circuits, Systems & Signal Processing, 2013, v. 32, n. 1, p. 1, doi. 10.1007/s00034-012-9438-6
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- Article
4
Advanced VLSI Design Methodologies for Emerging Industrial Multimedia and Communication Applications.
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- VLSI Design, 2014, p. 1, doi. 10.1155/2014/761215
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- Article
5
Advanced VLSI Architecture Design for Emerging Digital Systems.
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- VLSI Design, 2014, p. 1, doi. 10.1155/2014/746132
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- Publication type:
- Article
6
Engineering Change Orders Design Using Multiple Variables Linear Programming for VLSI Design.
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- VLSI Design, 2014, p. 1, doi. 10.1155/2014/698041
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- Article
7
A Low Cost Image De-noising Implementation Using Low Area CSLA for Impulse Noise Removal.
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- Journal of Circuits, Systems & Computers, 2018, v. 27, n. 4, p. -1, doi. 10.1142/S0218126618500603
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- Article
8
Novel Nanometric Reversible Low Power Bidirectional Universal Logarithmic Barrel Shifter with Overflow and Zero Flags.
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- Journal of Circuits, Systems & Computers, 2015, v. 24, n. 4, p. -1, doi. 10.1142/S0218126615500498
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- Article
9
MULTIFUNCTION RNS MODULO 2<sup>n</sup> ± 1 MULTIPLIERS.
- Published in:
- Journal of Circuits, Systems & Computers, 2012, v. 21, n. 4, p. -1, doi. 10.1142/S0218126612500272
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- Article
10
RELATIONS BETWEEN TWO COMMON TYPES OF RECTANGULAR TILINGS.
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- International Journal of Computational Geometry & Applications, 2009, v. 19, n. 2, p. 161, doi. 10.1142/S0218195909002885
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- Article
11
A Comparative Analysis of Voltage-Scaled Two Operand Binary Adders.
- Published in:
- Journal of Active & Passive Electronic Devices, 2010, v. 5, n. 3/4, p. 295
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- Publication type:
- Article
12
Vulnerability Analysis of Adder Architectures Considering Design and Synthesis Constraints.
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- Journal of Electronic Testing, 2018, v. 34, n. 1, p. 7, doi. 10.1007/s10836-017-5701-x
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- Article
13
Ultra-low-cost colour demosaicking VLSI design for real-time video applications.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2014, v. 50, n. 22, p. 1585, doi. 10.1049/el.2014.1017
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- Article
14
Recent Developments in Floorplan Representations.
- Published in:
- Interdisciplinary Information Sciences, 2015, v. 21, n. 4, p. 371, doi. 10.4036/iis.2015.L.05
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- Article
15
SURVIVOR GAME.
- Published in:
- Bulletin of the Transilvania University of Brasov, Series III: Mathematics, Informatics, Physics, 2012, v. 5, n. 54-2, p. 137
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- Article
16
A Novel VLSI Architecture for a Fuzzy Inference Processor Using Triangular-Shaped Membership Function.
- Published in:
- International Journal of Fuzzy Systems, 2012, v. 14, n. 3, p. 345
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- Article
17
An augmented Lagrangian method for VLSI global placement.
- Published in:
- Journal of Supercomputing, 2014, v. 69, n. 2, p. 714, doi. 10.1007/s11227-014-1113-1
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- Article
18
Comparative Study and Analysis of Universal Gates for Minimizing Power and Delay using Lector Technique.
- Published in:
- International Journal of Advanced Research in Computer Science, 2014, v. 5, n. 5, p. 29
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- Publication type:
- Article
19
Buffer Design and Assignment for Structured ASIC.
- Published in:
- Journal of Information Science & Engineering, 2014, v. 30, n. 1, p. 107
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- Article
20
A Unitary View Toward Analog Weighting/Amplifying F-F<sup>-1</sup> Cells.
- Published in:
- Electronics & Electrical Engineering, 2010, n. 106, p. 21
- Publication type:
- Article