Works matching DE "COMPUTER hardware description languages"

Results: 190

An Approach to the Design of Specific Hardware Circuits From C Programs.

Published in:

Journal of Information Science & Engineering, 2018, v. 34, n. 2, p. 337, doi. 10.6688/JISE.2018.34.2.2

By:

CHENG-JUEI YU;
YI-HSIN WU;
SHENG-DE WANG

Publication type:

Article

Synthesis of AMBA AHB from formal specification: a case study.

Published in:

International Journal on Software Tools for Technology Transfer, 2013, v. 15, n. 5/6, p. 585, doi. 10.1007/s10009-011-0207-9

By:

Godhal, Yashdeep;
Chatterjee, Krishnendu;
Henzinger, Thomas A.

Publication type:

Article

Coverage metrics for formal verification.

Published in:

International Journal on Software Tools for Technology Transfer, 2006, v. 8, n. 4/5, p. 373, doi. 10.1007/s10009-004-0175-4

By:

Chockler, Hana;
Kupferman, Orna;
Vardi, Moshe

Publication type:

Article

prialt in Handel-C: an operational semantics.

Published in:

International Journal on Software Tools for Technology Transfer, 2005, v. 7, n. 3, p. 248, doi. 10.1007/s10009-004-0181-6

By:

Butterfield, Andrew;
Woodcock, Jim

Publication type:

Article

Manta: rapid detection of structural variants and indels for germline and cancer sequencing applications.

Published in:

Bioinformatics, 2016, v. 32, n. 8, p. 1220, doi. 10.1093/bioinformatics/btv710

By:

Xiaoyu Chen;
Schulz-Trieglaff, Ole;
Shaw, Richard;
Barnes, Bret;
Schlesinger, Felix;
Källberg, Morten;
Cox, Anthony J.;
Kruglyak, Semyon;
Saunders, Christopher T.

Publication type:

Article

High‐throughput and compact reconfigurable architectures for recursive filters.

Published in:

IET Communications (Wiley-Blackwell), 2018, v. 12, n. 14, p. 1616, doi. 10.1049/iet-com.2018.0085

By:

Shinde, Vaishali;
Jai Kumar, Ganesh;
Valencia, Daniel;
Alimohammad, Amirhossein

Publication type:

Article

Hardware architectures for computing the cosine transforms over the finite field F28$\mathbb {F}_{2^8}$.

Published in:

Electronics Letters (Wiley-Blackwell), 2024, v. 60, n. 22, p. 1, doi. 10.1049/ell2.70097

By:

de Oliveira Neto, José R.;
Coutinho, Vítor A.

Publication type:

Article

Register Transfer Level Disparity generator with Stereo Vision.

Published in:

Journal of Open Research Software, 2021, v. 9, n. 1, p. 1, doi. 10.5334/jors.339

By:

JAYASENA, ARUNA

Publication type:

Article

Steganography using Verilog by LSB.

Published in:

Grenze International Journal of Engineering & Technology (GIJET), 2025, v. 11, n. Part1, p. 1187

By:

Umadi, Chetan;
R., Nagarathana;
Tushitaa, R.;
Jain, Riya;
Kumar, Shreeja Ashok;
S., Shreya

Publication type:

Article

Design a Vedic Multiplier using Xilinx Vivado.

Published in:

Grenze International Journal of Engineering & Technology (GIJET), 2024, v. 10, n. 1, Part 3, p. 2218

By:

Divya, B.;
Ravalika, C.;
Anjali, A.;
Kumar, B. Sai

Publication type:

Article

Design and Implementation of a 31-level Inverter Based on FPGA for Sustainable Energy Applications.

Published in:

Iranian Journal of Electrical & Electronic Engineering, 2024, v. 20, n. 3, p. 1

By:

ALI, Ali Riyadh;
ANTAR, Rakan Khalil;
Abdulghafoor, Abdul Ghani Abdulrazzaq

Publication type:

Article

Verification of a Real-Time Attitude Determination Algorithm through Development of 48-Channel GPS Attitude Receiver Hardware.

Published in:

Journal of Navigation, 2009, v. 62, n. 3, p. 397, doi. 10.1017/S0373463309005384

By:

Jaegyu Jang;
Changdon Kee

Publication type:

Article

FT-Format: 一种可配置的硬件代码快速格式化工具.

Published in:

Computer Engineering & Science / Jisuanji Gongcheng yu Kexue, 2025, v. 47, n. 6, p. 958, doi. 10.3969/j.issn.1007-130X.2025.06.002

By:

陈桂湘;
刘胜;
郭阳

Publication type:

Article

Computational Modeling of Cell Survival Using VHDL.

Published in:

BVICAM's International Journal of Information Technology, 2010, v. 2, n. 1, p. 53

By:

Jain, Shruti;
Naik, Pradeep K.;
Bhooshan, Sunil V.

Publication type:

Article

Field-programmable gate array implementation of efficient deep neural network architecture.

Published in:

International Journal of Electrical & Computer Engineering (2088-8708), 2024, v. 14, n. 4, p. 3863, doi. 10.11591/ijece.v14i4.pp3863-3875

By:

Kumar Reddy, Pottipati Dileep;
Ramanaiah, Kota Venkata

Publication type:

Article

Functional Verification of Large-integers Circuits using a Cosimulation-based Approach.

Published in:

International Journal of Electrical & Computer Engineering (2088-8708), 2017, v. 7, n. 4, p. 2192, doi. 10.11591/ijece.v7i4.pp2192-2205

By:

Alimi, Nejmeddine;
Lahbib, Younes;
Machhout, Mohsen;
Tourki, Rached

Publication type:

Article

A Unified Codec Scheme for reduction of Area and Crosstalk in RC and RLC Modeled Interconnects using both Bus Encoding and Shielding Insertion Technique.

Published in:

International Journal of Electrical & Computer Engineering (2088-8708), 2013, v. 3, n. 4, p. 524, doi. 10.11591/ijece.v3i4.3173

By:

Duggal, Dhriti;
Singh, Gurmohan;
Kaur, Manjit

Publication type:

Article

RECONFIGURABLE CELLULAR HARDWARE FOR COMMUNICATIONS - AN EDUCATIONAL PLATFORM DRIVEN BY VIRTUAL INSTRUMENTATION.

Published in:

eLearning & Software for Education, 2015, n. 1, p. 239, doi. 10.12753/2066-026X-15-035

By:

CHITIC, Mihail;
MACHIDON, Octavian Mihai;
SANDU, Florin

Publication type:

Article

Design, Verification and Implementation of a Watchdog Timer for Drone Applications.

Published in:

Journal of Engineering Science & Technology Review, 2024, v. 17, n. 6, p. 59, doi. 10.25103/jestr.176.08

By:

Madhushankara, M.;
Mathew, Ribu;
Maneesh, M. S.;
Vignesh, B.

Publication type:

Article

VLSI Architecture of Switching Median Filter for Salt and Pepper Noise Removal.

Published in:

IAENG International Journal of Computer Science, 2016, v. 43, n. 1, p. 44

By:

Vijaykumar, V. R.;
Santhanamari, G.;
Elango, S.

Publication type:

Article

Employing Integrated Logic Analysers and Virtual I/Os to Verify Soft Core Protocol Implementations.

Published in:

IAENG International Journal of Computer Science, 2010, v. 37, n. 1, p. 36

By:

Sheikh, I.;
Short, M.

Publication type:

Article

Embedding Instruments & Modules into an IEEE1451-FPGA-Based Weblab Infrastructure.

Published in:

International Journal of Online Engineering, 2012, v. 8, n. 3, p. 4, doi. 10.3991/ijoe.v8i3.2064

By:

Costa, Ricardo J.;
Alves, Gustavo R.;
Zenha-Rela, Mário

Publication type:

Article

Work-in-Progress on a Thin IEEE1451.0-Architecture to Implement Reconfigurable Web-lab Infrastructures.

Published in:

International Journal of Online Engineering, 2011, v. 7, n. S2, p. 5, doi. 10.3991/ijoe.v7iS2.1810

By:

Costa, Ricardo J.;
Alves, Gustavo R.;
Zenha-Rela, Mário

Publication type:

Article

Does model driven engineering tame complexity?

Published in:

Software & Systems Modeling, 2007, v. 6, n. 1, p. 1, doi. 10.1007/s10270-006-0041-9

By:

France, Robert;
Rumpe, Bernhard

Publication type:

Article

Modeling and simulation of FIR filter using distributed arithmetic algorithm on FPGA.

Published in:

Multimedia Tools & Applications, 2024, v. 83, n. 31, p. 75855, doi. 10.1007/s11042-024-18637-7

By:

Rai, Amrita;
Roy, Ajay;
Qamar, Shamimul;
Saif, Abdulelah G. F.;
Hamoda, Magdi Mohammad;
Azeem, Abdul;
Mohammed, Salman Arafath

Publication type:

Article

Syntactical and semantical aspects of Faust.

Published in:

Soft Computing - A Fusion of Foundations, Methodologies & Applications, 2004, v. 8, n. 9, p. 623, doi. 10.1007/s00500-004-0388-1

By:

Y. Orlarey;
D. Fober;
S. Letz

Publication type:

Article

Free Software Support for Compact Modelling with Verilog-A.

Published in:

Informacije MIDEM: Journal of Microelectronics, Electronic Components & Materials, 2024, v. 54, n. 4, p. 271, doi. 10.33180/InfMIDEM2024.404

By:

Bűrmen, Árpád;
Tuma, Tadej;
Fajfar, Iztok;
Rojec, Janez Puhan,Žiga;
Kunaver, Matevž;
Tomažič, Sašo

Publication type:

Article

Hardware Implementation of Chaotic Zigzag Map Based Bitwise Dynamical Pseudo Random Number Generator on Field-Programmable Gate Array.

Published in:

Informacije MIDEM: Journal of Microelectronics, Electronic Components & Materials, 2020, v. 50, n. 4, p. 243, doi. 10.33180/InfMIDEM2020.402

By:

Erdem, Ebubekir;
Garipcan, Ali Murat

Publication type:

Article

VHDL-AMS Simulation Framework for Molecular-FET Device-to-Circuit Modeling and Design.

Published in:

Active & Passive Electronic Components, 2018, p. 1, doi. 10.1155/2018/6974874

By:

Graziano, Mariagrazia;
Zahir, Ali;
Mehdy, Malik Ashter;
Piccinini, Gianluca

Publication type:

Article

An Intelligent Vehicular Traffic Signal Control System with State Flow Chart Design and FPGA Prototyping.

Published in:

Mehran University Research Journal of Engineering & Technology, 2017, v. 36, n. 2, p. 343, doi. 10.22581/muet1982.1702.12

By:

SOLANGI, UMAIR SAEED;
MEMON, TAYYAB DIN;
NOONARI, ABDUL SATTAR;
ANSARI, OMAIR AHMED

Publication type:

Article

Design and Co-Simulation of Depth Estimation Using Simulink HDL Coder and Modelsim.

Published in:

Mehran University Research Journal of Engineering & Technology, 2016, v. 35, n. 3, p. 473, doi. 10.22581/muet1982.1603.17

By:

MEMON, FARIDA;
MEMON, AAMIR HUSSAIN;
MEMON, RAFIA NAZ;
MEMON, FAYAZ AHMED

Publication type:

Article

CyberSightings.

Published in:: CyberPsychology, Behavior & Social Networking, 2016, v. 19, n. 7, p. 471, doi. 10.1089/cyber.2016.29042.csi
Publication type:: Article

LabVIEW FPGA Implementation Of a PID Controllerb For D.C. Motor Speed Control.

Published in:

Iraqi Journal for Electrical & Electronic Engineering, 2010, v. 6, n. 1, p. 139, doi. 10.33762/eeej.2010.54884

By:

Ali, Fakhrulddin H.;
Hussein, Mohammed Mahmood;
Ismael, Sinan M. B.

Publication type:

Article

Resource partitioning for Integrated Modular Avionics: comparative study of implementation alternatives.

Published in:

Software: Practice & Experience, 2014, v. 44, n. 12, p. 1441, doi. 10.1002/spe.2210

By:

Han, Sanghyun;
Jin, Hyun‐Wook

Publication type:

Article

Design Methodology of an Equalizer for Unipolar Non Return to Zero Binary Signals in the Presence of Additive White Gaussian Noise Using a Time Delay Neural Network on a Field Programmable Gate Array.

Published in:

Sensors (14248220), 2013, v. 13, n. 12, p. 16829, doi. 10.3390/s131216829

By:

Pérez Suárez, Santiago T.;
Travieso González, Carlos M.;
Alonso Hernández, Jesús B.

Publication type:

Article

Intrusion Detection System Using a Distributed Ensemble Design Based Convolutional Neural Network in Fog Computing.

Published in:

Journal of Information Hiding & Privacy Protection, 2022, v. 4, n. 1, p. 25, doi. 10.32604/jihpp.2022.029922

By:

Aiming Wu;
Shanshan Tu;
Wagas, Muhammad;
Yongjie Yang;
Yihe Zhang;
Xuetao Bai

Publication type:

Article

LLVM-C2RTL: C/C++ Based System Level RTL Design Framework Using LLVM Compiler Infrastructure.

Published in:

IPSJ Transactions on System LSI Design Methodology, 2023, v. 16, n. 1, p. 12, doi. 10.2197/ipsjtsldm.16.12

By:

TAMON SADASUE;
TSUYOSHI ISSHIKI

Publication type:

Article

Scalable Hardware Architecture for fast Gradient Boosted Tree Training.

Published in:

IPSJ Transactions on System LSI Design Methodology, 2021, v. 14, n. 1, p. 11, doi. 10.2197/ipsjtsldm.14.11

By:

TAMON SADASUE;
TAKUYA TANAKA;
RYOSUKE KASAHARA;
ARIEF DARMAWAN;
TSUYOSHI ISSHIKI

Publication type:

Article

A fog-based anonymous authentication scheme with location privacy for wireless body area network with FPGA implementation.

Published in:

International Journal of Information Security, 2024, v. 23, n. 1, p. 1, doi. 10.1007/s10207-023-00717-8

By:

Rajasekaran, Arun Sekar;
Azees, M.

Publication type:

Article

A Framework for Developing and Analyzing Software Architecture Specifications in SAM.

Published in:

Computer Journal, 2002, v. 45, n. 1, p. 111

By:

Xudong He;
Yi Deng

Publication type:

Article

Rainbow: Development, Simulation and Analysis Tools for Asynchronous Micropipeline Hardware Design.

Published in:

Computer Journal, 2002, v. 45, n. 1, p. 2, doi. 10.1093/comjnl/45.1.2

By:

Barringer, Howard;
Fellows, Donal;
Gough, Graham;
Williams, Alan

Publication type:

Article

Balsa: An Asynchronous Hardware Synthesis Language.

Published in:

Computer Journal, 2002, v. 45, n. 1, p. 12, doi. 10.1093/comjnl/45.1.12

By:

Edwards, Doug;
Bardsley, Andrew

Publication type:

Article

A Process Algebra Foundation for Reasoning about Core ELLA.

Published in:

Computer Journal, 1996, v. 39, n. 4, p. 303, doi. 10.1093/comjnl/39.4.303

By:

Barringer, H.;
Gouch, G.;
Monahan, B.;
Williams, A.

Publication type:

Article

DEVELOPMENT OF A CONTROL PATH VHDL CODE GENERATOR FOR HARDWARE DEVELOPMENT.

Published in:

i-Manager's Journal on Software Engineering, 2022, v. 16, n. 3, p. 16, doi. 10.26634/jse.16.3.18660

By:

GEORGE, MARCUS LLOYDE;
JOSEPH, BRANDON

Publication type:

Article

DEVELOPMENT OF A PORT MAPPING TOOL FOR DIGITAL LOGIC DEVELOPMENT.

Published in:

i-Manager's Journal on Software Engineering, 2019, v. 14, n. 1, p. 1, doi. 10.26634/jse.14.1.16337

By:

GEORGE, MARCUS LLOYDE;
BISSOON, AVIDESH

Publication type:

Article

Signed real measure of regular languages for discrete-event automata.

Published in:

International Journal of Control, 2003, v. 76, n. 18, p. 1800, doi. 10.1080/00207170310001635392

By:

Ray, Asok;
Phoha, Shashi

Publication type:

Article

Implementation of IEEE-754 to Decimal Conversion of Library Components for Floating Point Arithmetic Unit.

Published in:

International Transactions in Mathematical Sciences & Computer, 2011, v. 4, n. 2, p. 157

By:

Sharma, Subhash Kumar;
Srivastava, Vishal Kumar;
Shukla, Sachchida Nand

Publication type:

Article

Implementation of a FPGA Based Hybrid RF-THI PWM Control for an Inverter-Fed Induction Motor.

Published in:

International Review on Modelling & Simulations, 2012, v. 5, n. 6, p. 2420

By:

Stephen, Valantina;
Suresh, Padma

Publication type:

Article

FPGA-Based Real Time Simulation of ANFIS-MPPT Controller for Photovoltaic Systems.

Published in:

International Review on Modelling & Simulations, 2011, v. 4, n. 5, p. 2361

By:

Chekired, F.;
Larbes, C.;
Mellit, A.

Publication type:

Article

DIGITAL STREAM CIPHER BASED ON SCS-PRBG.

Published in:

International Journal of Modern Physics B: Condensed Matter Physics; Statistical Physics; Applied Physics, 2009, v. 23, n. 25, p. 5085, doi. 10.1142/S0217979209053539

By:

XINGYUAN WANG;
WEI LIU;
NINI GU;
HUAGUANG ZHANG

Publication type:

Article