Works matching DE "COMPUTER hardware description languages"
Results: 180
Modeling and simulation of FIR filter using distributed arithmetic algorithm on FPGA.
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- Multimedia Tools & Applications, 2024, v. 83, n. 31, p. 75855, doi. 10.1007/s11042-024-18637-7
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- Article
Non-linear behavioural modelling of device-level transients for complex power electronic converter circuit hardware realisation on FPGA.
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- IET Power Electronics (Wiley-Blackwell), 2018, v. 11, n. 9, p. 1, doi. 10.1049/iet-pel.2017.0212
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- Article
The use of FPGA in field-oriented control of an induction machine.
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- Turkish Journal of Electrical Engineering & Computer Sciences, 2010, v. 18, n. 6, p. 943, doi. 10.3906/elk-0905-40
- Publication type:
- Article
VHDL-AMS Simulation Framework for Molecular-FET Device-to-Circuit Modeling and Design.
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- Active & Passive Electronic Components, 2018, p. 1, doi. 10.1155/2018/6974874
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- Article
A Field-Programmable Gate Array-Based Quasi-Cyclic Low-Density Parity-Check Decoder with High Throughput and Excellent Decoding Performance for 5G New-Radio Standards.
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- Technologies (2227-7080), 2024, v. 12, n. 11, p. 215, doi. 10.3390/technologies12110215
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- Article
DESIGN MODELS OF BIT-STREAM ONLINE-COMPUTERS FOR SENSOR COMPONENTS.
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- Radio Electronics, Computer Science, Control, 2024, n. 1, p. 62, doi. 10.15588/1607-3274-2024-1-6
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- Article
TEMPORAL EVENTS PROCESSING MODELS IN FINITE STATE MACHINES.
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- Radio Electronics, Computer Science, Control, 2023, n. 4, p. 49, doi. 10.15588/1607-3274-2023-4-5
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- Article
Analysis Simulation & Hardware Designing of Digital Systems.
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- International Transactions in Applied Sciences, 2011, v. 3, n. 3, p. 381
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- Article
Enhanced FPGA Implementation of the SHA-512 Hash Function.
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- International Review on Computers & Software, 2014, v. 9, n. 11, p. 1816, doi. 10.15866/irecos.v9i11.2071
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- Article
A Modeling Tool for Dynamically Reconfigurable Systems.
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- International Review on Computers & Software, 2014, v. 9, n. 4, p. 600
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- Article
Experimental Implementation of Direct Torque Control of Induction Machine on FPGA.
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- International Review of Electrical Engineering, 2013, v. 8, n. 1, p. 128
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- Article
High Frequency Power Generation Using Cycloinverter with SVM.
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- International Review of Electrical Engineering, 2012, v. 7, n. 6, p. 6005
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- Article
Intrusion Detection System Using a Distributed Ensemble Design Based Convolutional Neural Network in Fog Computing.
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- Journal of Information Hiding & Privacy Protection, 2022, v. 4, n. 1, p. 25, doi. 10.32604/jihpp.2022.029922
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- Article
LLVM-C2RTL: C/C++ Based System Level RTL Design Framework Using LLVM Compiler Infrastructure.
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- IPSJ Transactions on System LSI Design Methodology, 2023, v. 16, n. 1, p. 12, doi. 10.2197/ipsjtsldm.16.12
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- Article
Scalable Hardware Architecture for fast Gradient Boosted Tree Training.
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- IPSJ Transactions on System LSI Design Methodology, 2021, v. 14, n. 1, p. 11, doi. 10.2197/ipsjtsldm.14.11
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- Publication type:
- Article
EFFICIENT HARDWARE IMPLEMENATATIONS OF FEEDFORWARD NEURAL NETWORKS USING FIELD PROGRAMMABLE GATE ARRAY.
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- Journal of Engineering Sciences, 2018, v. 46, n. 5, p. 539
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- Article
The Semantics of Web Services: An Examination in GIScience Applications.
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- ISPRS International Journal of Geo-Information, 2013, v. 2, n. 3, p. 888, doi. 10.3390/ijgi2030888
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- Article
Computational Modeling of Cell Survival Using VHDL.
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- BVICAM's International Journal of Information Technology, 2010, v. 2, n. 1, p. 53
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- Article
A Framework for Developing and Analyzing Software Architecture Specifications in SAM.
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- Computer Journal, 2002, v. 45, n. 1, p. 111
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- Article
Rainbow: Development, Simulation and Analysis Tools for Asynchronous Micropipeline Hardware Design.
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- Computer Journal, 2002, v. 45, n. 1, p. 2, doi. 10.1093/comjnl/45.1.2
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- Article
Balsa: An Asynchronous Hardware Synthesis Language.
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- Computer Journal, 2002, v. 45, n. 1, p. 12, doi. 10.1093/comjnl/45.1.12
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- Article
A Process Algebra Foundation for Reasoning about Core ELLA.
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- Computer Journal, 1996, v. 39, n. 4, p. 303, doi. 10.1093/comjnl/39.4.303
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- Article
Signed real measure of regular languages for discrete-event automata.
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- International Journal of Control, 2003, v. 76, n. 18, p. 1800, doi. 10.1080/00207170310001635392
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- Article
Implementation of IEEE-754 to Decimal Conversion of Library Components for Floating Point Arithmetic Unit.
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- International Transactions in Mathematical Sciences & Computer, 2011, v. 4, n. 2, p. 157
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- Publication type:
- Article
Using Aspect-Oriented State Machines for Detecting and Resolving Feature Interactions.
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- Computer Science & Information Systems, 2012, v. 9, n. 3, p. 1046, doi. 10.2298/CSIS111216033D
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- Article
Corrigendum to “PCIU: Hardware Implementations of an Efficient Packet Classification Algorithm with an Incremental Update Capability”.
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- 2018
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- Correction Notice
Software-Defined Radio FPGA Cores: Building towards a Domain-Specific Language.
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- International Journal of Reconfigurable Computing, 2017, p. 1, doi. 10.1155/2017/3925961
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- Article
A Top-Down Optimization Methodology for Mutually Exclusive Applications.
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- International Journal of Reconfigurable Computing, 2014, p. 1, doi. 10.1155/2014/827613
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- Article
AUTOMATED DEBUGGING OF VERILOG DESIGNS.
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- International Journal of Software Engineering & Knowledge Engineering, 2012, v. 22, n. 5, p. 695, doi. 10.1142/S0218194012500209
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- Publication type:
- Article
Case-based instruction in digital integrated circuit design courses for non-major students.
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- International Journal of Electrical Engineering Education, 2014, v. 51, n. 3, p. 231, doi. 10.7227/IJEEE.51.3.5
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- Article
Teaching hardware description languages to satisfy industry expectations.
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- International Journal of Electrical Engineering Education, 2009, v. 46, n. 3, p. 239, doi. 10.7227/IJEEE.46.3.3
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- Article
Acceleration of Recursive Data Sorting over Tree-based Structures.
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- Electronics & Electrical Engineering, 2011, n. 113, p. 51
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- Article
Codificador RS(255,k) en hardware reconfigurable orientado a radio cognitivo.
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- Ingeniería y Universidad, 2013, v. 17, n. 1, p. 77
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- Publication type:
- Article
A Real-Time Implementation Of An Autonomous Uav Controller Using Fpga: Based On Fuzzy Logic Approach.
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- International Journal of Simulation: Systems, Science & Technology, 2014, v. 15, n. 1, p. 37
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- Article
Decodificador Turbo MAP de varias iteraciones.
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- Ingeniería y Desarrollo, 2006, n. 20, p. 106
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- Article
Manta: rapid detection of structural variants and indels for germline and cancer sequencing applications.
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- Bioinformatics, 2016, v. 32, n. 8, p. 1220, doi. 10.1093/bioinformatics/btv710
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- Article
Design and implementation in an Altera's cyclone IV EP4CE6E22C8 FPGA board of a fast and robust cipher using combined 1D maps.
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- IET Image Processing (Wiley-Blackwell), 2024, v. 18, n. 7, p. 1823, doi. 10.1049/ipr2.13066
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- Publication type:
- Article
Register Transfer Level Disparity generator with Stereo Vision.
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- Journal of Open Research Software, 2021, v. 9, n. 1, p. 1, doi. 10.5334/jors.339
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- Publication type:
- Article
Design of an All-Digital Synchronized Frequency Multiplier Based on a Dual-Loop (D/FLL) Architecture.
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- VLSI Design, 2012, p. 1, doi. 10.1155/2012/546212
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- Publication type:
- Article
A Synthesizable VHDL Model of the Exact Solution for Three-dimensional Hyperbolic Positioning System.
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- VLSI Design, 2002, v. 15, n. 2, p. 507, doi. 10.1080/1065514021000012129
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- Article
Algorithm & Design of an Efficient Floating Point ADD/SUB Unit for an Experimental CPU.
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- International Journal of Intelligent Information Technology Application, 2009, v. 2, n. 6, p. 273
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- Publication type:
- Article
Improving dependability with low power fault detection model for skinny-hash.
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- PLoS ONE, 2024, v. 19, n. 12, p. 1, doi. 10.1371/journal.pone.0316012
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- Article
Genetic Algorithm applied to the Functional Verification in Digital Systems.
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- Journal of Integrated Circuits & Systems, 2018, v. 13, n. 1, p. 1, doi. 10.29292/jics.v13i1.20
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- Publication type:
- Article
Embedding Instruments & Modules into an IEEE1451-FPGA-Based Weblab Infrastructure.
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- International Journal of Online Engineering, 2012, v. 8, n. 3, p. 4, doi. 10.3991/ijoe.v8i3.2064
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- Publication type:
- Article
Work-in-Progress on a Thin IEEE1451.0-Architecture to Implement Reconfigurable Web-lab Infrastructures.
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- International Journal of Online Engineering, 2011, v. 7, n. S2, p. 5, doi. 10.3991/ijoe.v7iS2.1810
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- Publication type:
- Article
Designing Efficient Two-Level Reverse Converters for Moduli Set {22n+1-1,22n,2n-1}.
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- Circuits, Systems & Signal Processing, 2018, v. 37, n. 9, p. 4162, doi. 10.1007/s00034-018-0756-1
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- Article
DA-Based Efficient Testable FIR Filter Implementation on FPGA Using Reversible Logic.
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- Circuits, Systems & Signal Processing, 2014, v. 33, n. 3, p. 863, doi. 10.1007/s00034-013-9669-1
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- Article
An Approach to the Design of Specific Hardware Circuits From C Programs.
- Published in:
- Journal of Information Science & Engineering, 2018, v. 34, n. 2, p. 337, doi. 10.6688/JISE.2018.34.2.2
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- Article
Using virtual platform in embedded system education.
- Published in:
- Computer Applications in Engineering Education, 2012, v. 20, n. 2, p. 346, doi. 10.1002/cae.20401
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- Publication type:
- Article
Designing the microprocessor with Abel-HDL.
- Published in:
- Computer Applications in Engineering Education, 2001, v. 9, n. 2, p. 87, doi. 10.1002/cae.1009
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- Article