Works matching DE "CARRY-lookahead adders"
Results: 10
Simulation and Performance Analysis of 32 nm FinFet based 4-Bit Carry Look Adder.
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- Journal of Nano- & Electronic Physics, 2017, v. 9, n. 5, p. 1, doi. 10.21272/jnep.9(5).05003
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- Article
ASIC Implementation of Low Power Efficient Crosstalk Analytical by LUTBED- CLA.
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- International Journal of Intelligent Engineering & Systems, 2018, v. 11, n. 5, p. 125, doi. 10.22266/ijies2018.1031.12
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Implementation, Test Pattern Generation, and Comparative Analysis of Different Adder Circuits.
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- VLSI Design, 2016, p. 1, doi. 10.1155/2016/1260879
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- Article
3D-Modelling and Analysis of All-Optical Carry Look-Ahead Adder Circuits using Nonlinear Structures.
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- Indian Journal of Pure & Applied Physics, 2024, v. 62, n. 8, p. 642, doi. 10.56042/ijpap.v62i8.10349
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- Article
Delay Comparison for 16x16 Vedic Multiplier Using RCA and CLA.
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- International Journal of Electrical & Computer Engineering (2088-8708), 2016, v. 6, n. 3, p. 1205, doi. 10.11591/ijece.v6i3.9457
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- Article
Energy Efficient and Low Power Rca Based Full Adder.
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- Journal of VLSI Circuits & Systems (JVCS), 2020, v. 2, n. 1, p. 6, doi. 10.31838/jvcs/02.01.02
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- Article
Implementation of multi-operand addition in FPGA using high-level synthesis.
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- Przegląd Elektrotechniczny, 2018, v. 94, n. 2, p. 170, doi. 10.15199/48.2018.02.39
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- Article
Impacts of Work Function Variation and Line-Edge Roughness on TFET and FinFET Devices and 32-Bit CLA Circuits.
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- Journal of Low Power Electronics & Applications, 2015, v. 5, n. 2, p. 101, doi. 10.3390/jlpea5020101
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A Novel Nanometric Parity-Preserving Reversible Carry-Lookahead Adder.
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- IETE Journal of Research, 2017, v. 63, n. 3, p. 325, doi. 10.1080/03772063.2016.1205961
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- Article
Design and Analysis of 32-Bit CLA Using Energy Efficient Adiabatic Logic for Ultra-Low-Power Application.
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- Journal of Circuits, Systems & Computers, 2015, v. 24, n. 10, p. -1, doi. 10.1142/S0218126615501601
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- Article