Found: 14
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Tamper Resistance Simulation on Algorithm Level Design.
- Published in:
- Electrical Engineering in Japan, 2014, v. 186, n. 2, p. 40, doi. 10.1002/eej.22342
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- Article
Tamper Resistance Simulation on Algorithm Level Design.
- Published in:
- Electrical Engineering in Japan, 2014, p. 40, doi. 10.1002/eej.22342
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- Publication type:
- Article
Performance-driven placement procedure for low power.
- Published in:
- Electrical Engineering in Japan, 2005, v. 151, n. 1, p. 56, doi. 10.1002/eej.20057
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- Article
Architecture for High-Speed Evolutionary Computation.
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- Electrical Engineering in Japan, 2004, v. 147, n. 2, p. 723, doi. 10.1002/eej.10308
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- Article
Hierarchical hardware trojan for LUT‐based AI devices and its evaluation.
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- Electronics & Communications in Japan, 2022, v. 105, n. 1, p. 1, doi. 10.1002/ecj.12348
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- Article
AI hardware oriented neural network physical unclonable function and its evaluation.
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- Electronics & Communications in Japan, 2020, v. 103, n. 11/12, p. 54, doi. 10.1002/ecj.12276
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- Article
Multiple countermeasures on unrolled architecture PRINCE against power analysis and its evaluation.
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- Electronics & Communications in Japan, 2020, v. 103, n. 5/6, p. 41, doi. 10.1002/ecj.12249
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- Article
Authentication method using the variation of power generation time in energy harvester and its evaluation.
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- Electronics & Communications in Japan, 2020, v. 103, n. 5/6, p. 30, doi. 10.1002/ecj.12248
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- Article
Double-Rounds-Driven Electromagnetic Analysis Attack for a Lightweight Block Cipher Simeck and its Evaluation.
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- Electronics & Communications in Japan, 2017, v. 100, n. 12, p. 29, doi. 10.1002/ecj.12012
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- Article
Physical unclonable function with multiplexing units and its evaluation.
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- Electronics & Communications in Japan, 2013, v. 96, n. 6, p. 22, doi. 10.1002/ecj.11458
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- Article
Placement Tool Dedicated for a Via-Programmable Logic Device VPEX.
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- International Journal for Computers & Their Applications, 2011, v. 18, n. 4, p. 218
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- Article
Hardware-oriented ant colony optimization and its application to dynamic route guidance problem.
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- IEEJ Transactions on Electrical & Electronic Engineering, 2011, v. 6, n. 3, p. 221, doi. 10.1002/tee.20648
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- Article
Isolation of Vibrio cholerae and Vibrio vulnificus from Estuarine Waters, and Genotyping of V. vulnificus Isolates Using Loop-Mediated Isothermal Amplification.
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- Microorganisms, 2024, v. 12, n. 5, p. 877, doi. 10.3390/microorganisms12050877
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- Article
Hybrid Architecture of Genetic Algorithm and Simulated Annealing.
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- Engineering Letters, 2008, v. 16, n. 3, p. 339
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- Article