Found: 23
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Hardware-Based Implementation of Algorithms for Data Replacement in Cache Memory of Processor Cores.
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- Computers (2073-431X), 2024, v. 13, n. 7, p. 166, doi. 10.3390/computers13070166
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- Article
Basic Approaches for Reducing Power Consumption in Finite State Machine Circuits—A Review.
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- Applied Sciences (2076-3417), 2024, v. 14, n. 7, p. 2693, doi. 10.3390/app14072693
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- Article
Improving Characteristics of FPGA-Based FSMs Representing Sequential Blocks of Cyber-Physical Systems.
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- Applied Sciences (2076-3417), 2023, v. 13, n. 18, p. 10200, doi. 10.3390/app131810200
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- Article
Solving Load Balancing Problems in Routing and Limiting Traffic at the Network Edge.
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- Applied Sciences (2076-3417), 2023, v. 13, n. 17, p. 9489, doi. 10.3390/app13179489
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- Article
Improving the Spatial Characteristics of Three-Level LUT-Based Mealy FSM Circuits.
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- Electronics (2079-9292), 2023, v. 12, n. 5, p. 1133, doi. 10.3390/electronics12051133
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- Article
Hierarchical Queue Management Priority and Balancing Based Method under the Interaction Prediction Principle.
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- Electronics (2079-9292), 2023, v. 12, n. 3, p. 675, doi. 10.3390/electronics12030675
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- Article
Reducing Hardware in LUT-Based Mealy FSMs with Encoded Collections of Outputs.
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- Electronics (2079-9292), 2022, v. 11, n. 20, p. 3389, doi. 10.3390/electronics11203389
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- Article
Using a Double-Core Structure to Reduce the LUT Count in FPGA-Based Mealy FSMs.
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- Electronics (2079-9292), 2022, v. 11, n. 19, p. 3089, doi. 10.3390/electronics11193089
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- Article
Improving Hardware in LUT-Based Mealy FSMs.
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- Applied Sciences (2076-3417), 2022, v. 12, n. 16, p. N.PAG, doi. 10.3390/app12168065
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- Article
Using Codes of Output Collections for Hardware Reduction in Circuits of LUT-Based Finite State Machines.
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- Electronics (2079-9292), 2022, v. 11, n. 13, p. N.PAG, doi. 10.3390/electronics11132050
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- Article
Improving Characteristics of LUT-Based Sequential Blocks for Cyber-Physical Systems.
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- Energies (19961073), 2022, v. 15, n. 7, p. 2636, doi. 10.3390/en15072636
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- Article
Improving Characteristics of LUT-Based Three-Block Mealy FSMs' Circuits.
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- Electronics (2079-9292), 2022, v. 11, n. 6, p. 950, doi. 10.3390/electronics11060950
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- Article
Structural Decomposition in FSM Design: Roots, Evolution, Current State—A Review.
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- Electronics (2079-9292), 2021, v. 10, n. 10, p. 1174, doi. 10.3390/electronics10101174
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- Article
Improving Characteristics of LUT-Based Mealy FSMs with Twofold State Assignment.
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- Electronics (2079-9292), 2021, v. 10, n. 8, p. 901, doi. 10.3390/electronics10080901
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- Article
Improving LUT count of FPGA-based sequential blocks.
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- Bulletin of the Polish Academy of Sciences: Technical Sciences, 2021, v. 69, n. 2, p. 1, doi. 10.24425/bpasts.2021.136728
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- Article
Reducing LUT Count for FPGA-Based Mealy FSMs.
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- Applied Sciences (2076-3417), 2020, v. 10, n. 15, p. 5115, doi. 10.3390/app10155115
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- Article
Encoding of Terms in EMB-Based Mealy FSMs.
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- Applied Sciences (2076-3417), 2020, v. 10, n. 8, p. 2762, doi. 10.3390/app10082762
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- Article
Mixed Encoding of Collections of Output Variables for LUT-Based Mealy FSMs.
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- Journal of Circuits, Systems & Computers, 2019, v. 28, n. 8, p. N.PAG, doi. 10.1142/S0218126619501317
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- Article
Design of EMB-Based Moore FSMs.
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- Journal of Circuits, Systems & Computers, 2017, v. 26, n. 7, p. -1, doi. 10.1142/S0218126617501250
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- Article
Fault Detection Variants of the CloudBus Protocol for IoT Distributed Embedded Systems.
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- Advances in Electrical & Computer Engineering, 2017, v. 17, n. 2, p. 3, doi. 10.4316/AECE.2017.02001
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SoC Research and Development Platform for Distributed Embedded Systems.
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- Przegląd Elektrotechniczny, 2016, v. 92, n. 10, p. 262, doi. 10.15199/48.2016.10.59
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- Article
HARDWARE REDUCTION IN CPLD-BASED MOORE FSM.
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- Journal of Circuits, Systems & Computers, 2014, v. 23, n. 6, p. 1, doi. 10.1142/S0218126614500868
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- Article
HARDWARE REDUCTION IN FPGA-BASED MOORE FSM.
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- Journal of Circuits, Systems & Computers, 2013, v. 22, n. 3, p. -1, doi. 10.1142/S0218126613500060
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- Article