Further Improvements in Decoding Performance for 5G LDPC Codes Based on Modified Check-Node Unit.
- Published in:
- Radioengineering, 2023, v. 32, n. 2, p. 226, doi. 10.13164/re.2023.0226
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- Publication type:
- Article
Works by Nguyen-Ly, Thien Truong
Results: 2
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2
An FPGA Design with High Memory Efficiency and Decoding Performance for 5G LDPC Decoder.
- Published in:
- Electronics (2079-9292), 2023, v. 12, n. 17, p. 3667, doi. 10.3390/electronics12173667
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- Publication type:
- Article