Found: 13
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The use of reversible logic gates in the design of residue number systems.
- Published in:
- International Journal of Electrical & Computer Engineering (2088-8708), 2023, v. 13, n. 2, p. 2009, doi. 10.11591/ijece.v13i2.pp2009-2022
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- Article
uLog: a software-based approximate logarithmic number system for computations on SIMD processors.
- Published in:
- Journal of Supercomputing, 2023, v. 79, n. 2, p. 1750, doi. 10.1007/s11227-022-04713-y
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- Article
A joint computational and resource allocation model for fast parallel data processing in fog computing.
- Published in:
- Journal of Supercomputing, 2022, v. 78, n. 10, p. 12662, doi. 10.1007/s11227-022-04374-x
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- Article
New Multiply-Accumulate Circuits Based on Variable Latency Speculative Architectures with Asynchronous Data Paths.
- Published in:
- Majlesi Journal of Electrical Engineering, 2022, v. 16, n. 2, p. 41, doi. 10.52547/mjee.16.2.41
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- Article
Zero-Aware Low-Precision RNS Scaling Scheme.
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- Axioms (2075-1680), 2022, v. 11, n. 1, p. 5, doi. 10.3390/axioms11010005
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- Article
Hunter–prey optimization: algorithm and applications.
- Published in:
- Soft Computing - A Fusion of Foundations, Methodologies & Applications, 2022, v. 26, n. 3, p. 1279, doi. 10.1007/s00500-021-06401-0
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- Article
Magnitude Comparison and Sign Detection based on the 4- Moduli Set {2<sup>n</sup>+1, 2<sup>n</sup>-1, 2<sup>n</sup>+3, 2<sup>n</sup>-3}.
- Published in:
- Majlesi Journal of Electrical Engineering, 2021, v. 15, n. 3, p. 93, doi. 10.52547/mjee.15.3.93
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- Article
A fault-tolerant architecture for internet-of-things based on software-defined networks.
- Published in:
- Telecommunication Systems, 2021, v. 77, n. 1, p. 155, doi. 10.1007/s11235-020-00750-1
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- Article
MULTIFUNCTIONAL UNIT FOR REVERSE CONVERSION AND SIGN DETECTION BASED ON FIVE-MODULI SET {2<sup>2N</sup>, 2<sup>N</sup> + 1, 2<sup>N</sup> - 1, 2<sup>N</sup> + 3, 2<sup>N</sup> - 3}.
- Published in:
- Computer Science, 2021, v. 22, n. 1, p. 101, doi. 10.7494/csci.2021.22.1.3823
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- Article
A novel fast and small XOR-base full-adder in quantum-dot cellular automata.
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- Applied Nanoscience, 2020, v. 10, n. 11, p. 4037, doi. 10.1007/s13204-020-01511-x
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- Article
Efficient programmable power‐of‐two scaler for the three‐moduli set {2<sup>n</sup><sup>+</sup><sup>p</sup>, 2<sup>n</sup> − 1, 2<sup>n</sup><sup>+1</sup> − 1}.
- Published in:
- ETRI Journal, 2020, v. 42, n. 4, p. 596, doi. 10.4218/etrij.2018-0408
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- Article
New energy‐efficient hybrid wide‐operand adder architecture.
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- IET Circuits, Devices & Systems (Wiley-Blackwell), 2019, v. 13, n. 8, p. 1221, doi. 10.1049/iet-cds.2019.0084
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- Article
A New Coplanar Full Adder/Subtractor in Quantum-Dot Cellular Automata Technology.
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- Majlesi Journal of Telecommunication Devices, 2018, v. 7, n. 2, p. 53
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- Article