Found: 14
Select item for more details and to access through your institution.
Self-Adaptive Termination Check of Min-Sum Algorithm for LDPC Decoders Using the First Two Minima.
- Published in:
- KSII Transactions on Internet & Information Systems, 2017, v. 11, n. 4, p. 1987, doi. 10.3837/tiis.2017.04.009
- By:
- Publication type:
- Article
Parallel LDPC Decoding on a Heterogeneous Platform using OpenCL.
- Published in:
- KSII Transactions on Internet & Information Systems, 2016, v. 10, n. 6, p. 2648, doi. 10.3837/tiis.2016.06.011
- By:
- Publication type:
- Article
A Parallelization Technique with Integrated Multi-Threading for Video Decoding on Multi-core Systems.
- Published in:
- KSII Transactions on Internet & Information Systems, 2013, v. 7, n. 10, p. 2479, doi. 10.3837/tiis.2013.10.009
- By:
- Publication type:
- Article
CONNA: Configurable Matrix Multiplication Engine for Neural Network Acceleration.
- Published in:
- Electronics (2079-9292), 2022, v. 11, n. 15, p. 2373, doi. 10.3390/electronics11152373
- By:
- Publication type:
- Article
CENNA: Cost-Effective Neural Network Accelerator.
- Published in:
- Electronics (2079-9292), 2020, v. 9, n. 1, p. 134, doi. 10.3390/electronics9010134
- By:
- Publication type:
- Article
Selection-based Low-cost Check Node Operation for Extended Min-Sum Algorithm.
- Published in:
- KSII Transactions on Internet & Information Systems, 2021, v. 15, n. 2, p. 485, doi. 10.3837/tiis.2021.02.006
- By:
- Publication type:
- Article
Dynamic voltage and frequency scaling scheme for an adaptive LDPC decoder using SNR estimation.
- Published in:
- EURASIP Journal on Wireless Communications & Networking, 2013, v. 2013, n. 1, p. 1, doi. 10.1186/1687-1499-2013-255
- By:
- Publication type:
- Article
Symmetric Adiabatic Logic Circuits against Differential Power Analysis.
- Published in:
- ETRI Journal, 2010, v. 32, n. 1, p. 166, doi. 10.4218/etrij.10.0209.0247
- By:
- Publication type:
- Article
Dynamic power management for embedded processors in system-on-chip designs.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2014, v. 50, n. 18, p. 1309, doi. 10.1049/el.2014.1374
- By:
- Publication type:
- Article
Dynamic power management for embedded processors in system‐on‐chip designs.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2014, v. 50, n. 17, p. 1309, doi. 10.1049/el.2014.1374
- By:
- Publication type:
- Article
Runtime Memory Controller Profiling with Performance Analysis for DRAM Memory Controllers.
- Published in:
- Journal of Circuits, Systems & Computers, 2018, v. 27, n. 8, p. -1, doi. 10.1142/S0218126618501268
- By:
- Publication type:
- Article
THERMAL-AWARE HIGH-LEVEL SYNTHESIS BASED ON NETWORK FLOW METHOD.
- Published in:
- Journal of Circuits, Systems & Computers, 2009, v. 18, n. 5, p. 965, doi. 10.1142/S0218126609005472
- By:
- Publication type:
- Article
A Complete Model for Glitch Analysis in Logic Circuits.
- Published in:
- Journal of Circuits, Systems & Computers, 2002, v. 11, n. 2, p. 137, doi. 10.1142/S0218126602000367
- By:
- Publication type:
- Article
Decomposition of Bus-Invert Coding for Low-Power I/O.
- Published in:
- Journal of Circuits, Systems & Computers, 2000, v. 10, n. 1/2, p. 101, doi. 10.1142/S0218126600000093
- By:
- Publication type:
- Article