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Hardware Efficient Hybrid Pseudo-Random Bit Generator Using Coupled-LCG and Multistage LFSR with Clock Gating Network.
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- Journal of Circuits, Systems & Computers, 2023, v. 32, n. 3, p. 1, doi. 10.1142/S0218126623500391
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- Article
Hardware Efficient Pseudo-Random Number Generator Using Chen Chaotic System on FPGA.
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- Journal of Circuits, Systems & Computers, 2022, v. 31, n. 3, p. 1, doi. 10.1142/S0218126622500438
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- Article
Efficient Hardware Implementation of Pseudo-Random Bit Generator Using Dual-CLCG Method.
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- Journal of Circuits, Systems & Computers, 2021, v. 30, n. 10, p. 1, doi. 10.1142/S0218126621501826
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- Article
Impact of Work Function Tunability on Thermal and RF Performance of P-type Window Based Junctionless Transistor.
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- Advances in Electrical & Electronic Engineering, 2022, v. 20, n. 1, p. 73, doi. 10.15598/aeee.v20i1.4258
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- Article
DESIGN OF AN EFFICIENT PARALLEL COMPARATOR ARCHITECTURE FOR LOW POWER DELAY PRODUCT.
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- Advances in Electrical & Electronic Engineering, 2021, v. 19, n. 2, p. 155, doi. 10.15598/aeee.v19i2.4101
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- Article
Analyses of Reconfigurable Chaotic Systems and their Cryptographic S-box Design Applications.
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- Chaos Theory & Applications (CHTA), 2023, v. 5, n. 3, p. 219, doi. 10.51537/chaos.1285094
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- Article