IQC-synthesis with general dynamic multipliers.
- Published in:
- International Journal of Robust & Nonlinear Control, 2014, v. 24, n. 17, p. 3027, doi. 10.1002/rnc.3042
- By:
- Publication type:
- Article
Works matching DE "ANALOG multipliers"
Results: 223
1
2
A cooperative model of photovoltaic and electricity-to-hydrogen including green certificate trading under the conditional value at risk.
- Published in:
- Global Energy Interconnection, 2023, v. 6, n. 4, p. 403, doi. 10.1016/j.gloei.2023.08.003
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- Publication type:
- Article
3
A parallel multi‐block alternating direction method of multipliers for tensor completion.
- Published in:
- IET Image Processing (Wiley-Blackwell), 2021, v. 15, n. 13, p. 3053, doi. 10.1049/ipr2.12289
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- Publication type:
- Article
4
High Speed and Efficient Wallace Tree Multiplier for Dsp Applications.
- Published in:
- Journal of VLSI Circuits & Systems (JVCS), 2020, v. 2, n. 1, p. 1, doi. 10.31838/jvcs/02.01.01
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- Publication type:
- Article
5
An Analog of Multiplier Sequences for the Set of Totally Positive Sequences.
- Published in:
- Journal of Mathematical Physics, Analysis, Geometry (18129471), 2024, v. 20, n. 3, p. 353
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- Publication type:
- Article
6
A Novel Floating Memristor Emulator with Minimal Components.
- Published in:
- Active & Passive Electronic Components, 2017, p. 1, doi. 10.1155/2017/1609787
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- Publication type:
- Article
7
A general method of fractional dynamics, i.e., fractional Jacobi last multiplier method, and its applications.
- Published in:
- Acta Mechanica, 2017, v. 228, n. 1, p. 157, doi. 10.1007/s00707-016-1699-x
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- Publication type:
- Article
8
An optimal feedforward circuit with null audio susceptibility in feedback‐controlled buck converter.
- Published in:
- International Journal of Circuit Theory & Applications, 2025, v. 53, n. 1, p. 363, doi. 10.1002/cta.4068
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- Publication type:
- Article
9
Efficient hardware implementations of point multiplication for binary Edwards curves.
- Published in:
- International Journal of Circuit Theory & Applications, 2018, v. 46, n. 8, p. 1516, doi. 10.1002/cta.2498
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- Publication type:
- Article
10
Analysis of a balanced analog multiplier for an arbitrary number of signed inputs.
- Published in:
- International Journal of Circuit Theory & Applications, 2017, v. 45, n. 4, p. 483, doi. 10.1002/cta.2243
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- Publication type:
- Article
11
Guest Editorial 'Secure lightweight crypto-hardware'.
- Published in:
- 2017
- By:
- Publication type:
- Editorial
12
Multiplier-less VLSI architectures for radix-2<sup>2</sup> folded pipelined complex FFT core.
- Published in:
- International Journal of Circuit Theory & Applications, 2015, v. 43, n. 11, p. 1743, doi. 10.1002/cta.2038
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- Publication type:
- Article
13
FPGA Implementation Of FIR Filter Using Approximate Computing.
- Published in:
- Journal of Algebraic Statistics, 2022, v. 13, n. 3, p. 4130
- By:
- Publication type:
- Article
14
Performance-Oriented Manufacturability Analysis of a 5 GHz Satellite Oscillator.
- Published in:
- International Review of Mechanical Engineering, 2012, v. 6, n. 7, p. 1461
- By:
- Publication type:
- Article
15
The Optimum-efficiency Beam Multiplier for an Arbitrary Number of Output Beams and Power Distribution.
- Published in:
- Journal of Telecommunications & Information Technology, 2017, n. 3, p. 94, doi. 10.26636/jtit.2017.118617
- By:
- Publication type:
- Article
16
Integrable CMOS-Based Current-Mode Sinusoidal Frequency and Peak Detector.
- Published in:
- Circuits, Systems & Signal Processing, 2017, v. 36, n. 12, p. 4937, doi. 10.1007/s00034-017-0604-8
- By:
- Publication type:
- Article
17
Design of Low-Power Voltage Scalable Arithmetic Units with Perfect Timing Error Cancelation.
- Published in:
- Circuits, Systems & Signal Processing, 2017, v. 36, n. 11, p. 4309, doi. 10.1007/s00034-017-0534-5
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- Publication type:
- Article
18
Efficient Design for Radix-8 Booth Multiplier and Its Application in Lifting 2-D DWT.
- Published in:
- Circuits, Systems & Signal Processing, 2017, v. 36, n. 3, p. 1129, doi. 10.1007/s00034-016-0349-9
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- Publication type:
- Article
19
A Reduced-sp- $$\hbox {D3L}_{\mathrm{sum}}$$ Adder-Based High Frequency $$4\times 4$$ Bit Multiplier Using Dadda Algorithm.
- Published in:
- Circuits, Systems & Signal Processing, 2016, v. 35, n. 9, p. 3113, doi. 10.1007/s00034-015-0201-7
- By:
- Publication type:
- Article
20
Method for Designing Efficient Mixed Radix Multipliers.
- Published in:
- Circuits, Systems & Signal Processing, 2014, v. 33, n. 10, p. 3165, doi. 10.1007/s00034-014-9799-0
- By:
- Publication type:
- Article
21
VLSI Implementation of Double-Precision Floating-Point Multiplier Using Karatsuba Technique.
- Published in:
- Circuits, Systems & Signal Processing, 2013, v. 32, n. 1, p. 15, doi. 10.1007/s00034-012-9457-3
- By:
- Publication type:
- Article
22
A novel topology for four-quadrant GaAs monolithic multipliers.
- Published in:
- Microwave & Optical Technology Letters, 1999, v. 21, n. 4, p. 277, doi. 10.1002/(SICI)1098-2760(19990520)21:4<277::AID-MOP14>3.0.CO;2-K
- By:
- Publication type:
- Article
23
AN ON-WAFER METHOD FOR C-V CHARACTERIZATION OF HETEROSTRUCTURE DIODES.
- Published in:
- Microwave & Optical Technology Letters, 1995, v. 9, n. 2, p. 63, doi. 10.1002/mop.4650090202
- By:
- Publication type:
- Article
24
POLARIZATION-ENCODED OPTICAL SHADOW CASTING: AN EFFICIENT MULTIPLIER DESIGN.
- Published in:
- Microwave & Optical Technology Letters, 1991, v. 4, n. 8, p. 328, doi. 10.1002/mop.4650040815
- By:
- Publication type:
- Article
25
QUANTUM-WELL AND QUANTUM-BARRIER DIODES FOR GENERATING SUBMILLIMETER WAVE POWER.
- Published in:
- Microwave & Optical Technology Letters, 1991, v. 4, n. 1, p. 33, doi. 10.1002/mop.4650040111
- By:
- Publication type:
- Article
26
SPEED VARIATIONS IN CAGE INDUCTION MOTORS UNDER SINUSOIDAL VOLTAGE MODULATION.
- Published in:
- Scientific Journal of Gdynia Maritme University, 2022, n. 124, p. 31, doi. 10.26408/124.03
- By:
- Publication type:
- Article
27
Unified left eigenvector (ULEV) for blind source separation.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2022, v. 58, n. 1, p. 41, doi. 10.1049/ell2.12346
- By:
- Publication type:
- Article
28
An area‐efficient memory‐based multiplier powering eight parallel multiplications for convolutional neural network processors.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2021, v. 57, n. 15, p. 573, doi. 10.1049/ell2.12206
- By:
- Publication type:
- Article
29
Optimum multiplierless compensators for sharpened cascaded-integrator-comb decimation filters.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2018, v. 54, n. 16, p. 971, doi. 10.1049/el.2018.5114
- By:
- Publication type:
- Article
30
Low-power high-performance CMOS 5-2 compressor with 58 transistors.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2018, v. 54, n. 5, p. 278, doi. 10.1049/el.2017.3339
- By:
- Publication type:
- Article
31
Robust kernelised correlation filter tracking with least absolute deviations regression.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2018, v. 54, n. 3, p. 138, doi. 10.1049/el.2017.2147
- By:
- Publication type:
- Article
32
An Energy-efficient and Accuracy-adjustable bfloat16 Multiplier.
- Published in:
- Informacije MIDEM: Journal of Microelectronics, Electronic Components & Materials, 2023, v. 53, n. 2, p. 79, doi. 10.33180/InfMIDEM2023.203
- By:
- Publication type:
- Article
33
Practical Floating Capacitance Multiplier Implementation with Commercially Available IC LT1228s.
- Published in:
- Informacije MIDEM: Journal of Microelectronics, Electronic Components & Materials, 2021, v. 51, n. 1, p. 85, doi. 10.33180/InfMIDEM2021.106
- By:
- Publication type:
- Article
34
DTMOS Based High Bandwidth Four-Quadrant Analog Multiplier.
- Published in:
- Informacije MIDEM: Journal of Microelectronics, Electronic Components & Materials, 2020, v. 50, n. 2, p. 137, doi. 10.33180/InfMIDEM2020.206
- By:
- Publication type:
- Article
35
Electronically Adjustable Capacitance Multiplier Circuit with a Single Voltage Differencing Gain Amplifier (VDGA).
- Published in:
- Informacije MIDEM: Journal of Microelectronics, Electronic Components & Materials, 2019, v. 49, n. 4, p. 211, doi. 10.33180/InfMIDEM2019.403
- By:
- Publication type:
- Article
36
A generic online acceleration scheme for optimization algorithms via relaxation and inertia.
- Published in:
- Optimization Methods & Software, 2019, v. 34, n. 2, p. 383, doi. 10.1080/10556788.2017.1396601
- By:
- Publication type:
- Article
37
A Lagrangean-based decomposition approach for the link constrained Steiner tree problem<sup>**</sup>.
- Published in:
- Optimization Methods & Software, 2018, v. 33, n. 3, p. 650, doi. 10.1080/10556788.2017.1392518
- By:
- Publication type:
- Article
38
Analysis of Booth Multiplier based Conventional and Short Word Length FIR Filter.
- Published in:
- Mehran University Research Journal of Engineering & Technology, 2018, v. 37, n. 3, p. 595, doi. 10.22581/muet1982.1803.13
- By:
- Publication type:
- Article
39
Global generation of test ideals in mixed characteristic and applications.
- Published in:
- Algebraic Geometry, 2024, v. 11, n. 5, p. 675, doi. 10.14231/AG-2024-020
- By:
- Publication type:
- Article
40
Multiplier Evolution: A Family of Multiplier VLSI Implementations.
- Published in:
- Computer Journal, 2008, v. 51, n. 5, p. 585, doi. 10.1093/comjnl/bxm123
- By:
- Publication type:
- Article
41
Analysis and Improvement of the Real-Time Segmented Pulse Compression-Detection Algorithm.
- Published in:
- Journal of Donghua University (English Edition), 2016, v. 33, n. 6, p. 936
- By:
- Publication type:
- Article
42
Design of a new CMOS Low-Power Analogue Neuron.
- Published in:
- IETE Journal of Research, 2018, v. 64, n. 1, p. 67, doi. 10.1080/03772063.2017.1351315
- By:
- Publication type:
- Article
43
Low Voltage High Performance CMOS Current Mode Four-Quadrant Analog Multiplier Circuit.
- Published in:
- Radioengineering, 2022, v. 31, n. 2, p. 216, doi. 10.13164/re.2022.0216
- By:
- Publication type:
- Article
44
VLSI Implementation of Fixed-Point Lattice Wave Digital Filters for Increased Sampling Rate.
- Published in:
- Radioengineering, 2016, v. 25, n. 4, p. 821, doi. 10.13164/re.2016.0821
- By:
- Publication type:
- Article
45
Low Voltage Floating Gate MOS Transistor Based Four-Quadrant Multiplier.
- Published in:
- Radioengineering, 2014, v. 23, p. 1150
- By:
- Publication type:
- Article
46
Compact CMOS Analog Multiplier Free of Voltage Reference Generators.
- Published in:
- Journal of Integrated Circuits & Systems, 2020, v. 15, n. 3, p. 1, doi. 10.29292/jics.v15i3.139
- By:
- Publication type:
- Article
47
Approaches towards Implementation of Multi-bit Digital Receiver using Fast Fourier Transform.
- Published in:
- Defence Science Journal, 2013, v. 63, n. 2, p. 198, doi. 10.14429/dsj.63.4264
- By:
- Publication type:
- Article
48
Energy-efficient transmission strategies for CoMP downlink—overview, extension, and numerical comparison.
- Published in:
- EURASIP Journal on Wireless Communications & Networking, 2018, v. 2018, n. 1, p. 1, doi. 10.1186/s13638-018-1214-2
- By:
- Publication type:
- Article
49
A DTMOS based Four-Quadrant Analog Multiplier.
- Published in:
- Electrica, 2020, v. 20, n. 2, p. 207, doi. 10.5152/electrica.2020.20019
- By:
- Publication type:
- Article
50
Four quadrant FGMOS analog multiplier.
- Published in:
- Turkish Journal of Electrical Engineering & Computer Sciences, 2011, v. 19, n. 2, p. 291, doi. 10.3906/elk-1001-377
- By:
- Publication type:
- Article