Works matching DE "INTEGRATED circuits testing"

Results: 32

An efficient small-delay faults simulator based on critical path tracing.

Published in:

International Journal of Circuit Theory & Applications, 2015, v. 43, n. 8, p. 1015, doi. 10.1002/cta.1990

By:

Liu, Tieqiao;
Kuang, Jishun;
Cai, Shuo;
You, Zhiqiang

Publication type:

Article

Analysing semiconductor manufacturing big data for root cause detection of excursion for yield enhancement.

Published in:

International Journal of Production Research, 2017, v. 55, n. 17, p. 5095, doi. 10.1080/00207543.2015.1109153

By:

Chien, Chen-Fu;
Liu, Chiao-Wen;
Chuang, Shih-Chung

Publication type:

Article

Improved test stimulus scan-in method for integrated circuits.

Published in:

DYNA - Ingeniería e Industria, 2018, v. 93, n. 4, p. 391, doi. 10.6036/8788

By:

Chuandong Chen;
Haibo Luo;
Yuxiang Chen

Publication type:

Article

Testing for gate oxide short defects using the detectability interval paradigm.

Published in:

IT: Information Technology, 2014, v. 56, n. 4, p. 173, doi. 10.1515/itit-2013-1040

By:

Galliere, Jean-Marc;
Azais, Florence;
Comte, Mariane;
Renovell, Michel

Publication type:

Article

Testing integrated circuits.

Published in:

IT: Information Technology, 2014, v. 56, n. 4, p. 148, doi. 10.1515/itit-2014-1043

By:

Drechsler, Rolf

Publication type:

Article

Test and Diagnosis of Automotive Embedded Processors via High-Speed Standard Interfaces.

Published in:

Journal of Circuits, Systems & Computers, 2017, v. 26, n. 8, p. -1, doi. 10.1142/S0218126617400060

By:

Gleichner, Christian;
Vierhaus, Heinrich T.

Publication type:

Article

LFSR Reseeding-Oriented Low-Power Test-Compression Architecture for Scan Designs.

Published in:

Journal of Electronic Testing, 2018, v. 34, n. 6, p. 685, doi. 10.1007/s10836-018-5756-3

By:

Yuan, Haiying;
Zhou, Changshi;
Sun, Xun;
Zhang, Kai;
Zheng, Tong;
Liu, Chang;
Wang, Xiuyu

Publication type:

Article

A Reliability-Aware Methodology to Isolate Timing-Critical Paths under Aging.

Published in:

Journal of Electronic Testing, 2017, v. 33, n. 6, p. 721, doi. 10.1007/s10836-017-5692-7

By:

Srivastava, Ankush;
Singh, Virendra;
Singh, Adit;
Saluja, Kewal

Publication type:

Article

Test Planning for Core-based Integrated Circuits under Power Constraints.

Published in:

Journal of Electronic Testing, 2017, v. 33, n. 1, p. 7, doi. 10.1007/s10836-016-5638-5

By:

SenGupta, Breeta;
Nikolov, Dimitar;
Ingelsson, Urban;
Larsson, Erik

Publication type:

Article

Defect Level Constrained Optimization of Analog and Radio Frequency Specification Tests.

Published in:

Journal of Electronic Testing, 2015, v. 31, n. 5/6, p. 479, doi. 10.1007/s10836-015-5545-1

By:

Sindia, Suraj;
Agrawal, Vishwani

Publication type:

Article

Detecting Hardware Trojans using On-chip Sensors in an ASIC Design.

Published in:

Journal of Electronic Testing, 2015, v. 31, n. 1, p. 11, doi. 10.1007/s10836-015-5504-x

By:

Kelly, Shane;
Zhang, Xuehui;
Tehranipoor, Mohammed;
Ferraiuolo, Andrew

Publication type:

Article

Online Testable Approaches in Reversible Logic.

Published in:

Journal of Electronic Testing, 2013, v. 29, n. 6, p. 763, doi. 10.1007/s10836-013-5399-3

By:

Nayeem, N. M.;
Rice, J. E.

Publication type:

Article

Efficient Test Compression Technique for SoC Based on Block Merging and Eight Coding.

Published in:

Journal of Electronic Testing, 2013, v. 29, n. 6, p. 849, doi. 10.1007/s10836-013-5415-7

By:

Wu, Tie-Bin;
Liu, Heng-Zhu;
Liu, Peng-Xia

Publication type:

Article

Observation-Oriented ATPG and Scan Chain Disabling for Capture Power Reduction.

Published in:

Journal of Electronic Testing, 2013, v. 29, n. 5, p. 625, doi. 10.1007/s10836-013-5404-x

By:

Lee, Lung-Jen

Publication type:

Article

Guest Editorial: Test and Verification Challenges for Future Microprocessors and SoC Designs.

Published in:

2013

By:

Ray, Sandip;
Bhadra, Jay;
Abadir, Magdy;
Wang, Li-C

Publication type:

Editorial

A New Analog Circuit Fault Diagnosis Method Based on Improved Mahalanobis Distance.

Published in:

Journal of Electronic Testing, 2013, v. 29, n. 1, p. 95, doi. 10.1007/s10836-012-5342-z

By:

Han, Han;
Wang, Houjun;
Tian, Shulin;
Zhang, Na

Publication type:

Article

Efficient Pattern Generation for Small-Delay Defects Using Selection of Critical Faults.

Published in:

Journal of Electronic Testing, 2013, v. 29, n. 1, p. 35, doi. 10.1007/s10836-012-5345-9

By:

Bao, Fang;
Peng, Ke;
Yilmaz, Mahmut;
Chakrabarty, Krishnendu;
Winemberg, LeRoy;
Tehranipoor, Mohammad

Publication type:

Article

Eliminating the Timing Penalty of Scan.

Published in:

Journal of Electronic Testing, 2013, v. 29, n. 1, p. 103, doi. 10.1007/s10836-013-5352-5

By:

Sinanoglu, Ozgur;
Agrawal, Vishwani

Publication type:

Article

2011 JETTA Reviewers.

Published in:: Journal of Electronic Testing, 2012, v. 28, n. 1, p. 7, doi. 10.1007/s10836-012-5278-3
Publication type:: Article

Test Technology Newsletter.

Published in:: Journal of Electronic Testing, 2012, v. 28, n. 1, p. 11, doi. 10.1007/s10836-012-5280-9
Publication type:: Article

Build Testbenches for Verification in Shift Register ICs using SystemVerilog.

Published in:

International Journal of Electronics & Telecommunications, 2022, v. 68, n. 3, p. 619, doi. 10.24425/ijet.2022.141281

By:

Widianto;
H., M. Chasrun;
Lis, Robert

Publication type:

Article

PROTECTING AI CHIPS FROM THERMAL CHALLENGES DURING ATE TEST.

Published in:

EE: Evaluation Engineering, 2019, v. 58, n. 6, p. 24

By:

Peach, Carl;
Yi Zhang

Publication type:

Article

DPI With Integrated Current and Voltage Measurement.

Published in:

Microwave Journal, 2016, p. 24

By:

König, Sven

Publication type:

Article

Automotive semiconductor test key topic at ITC.

Published in:

EE: Evaluation Engineering, 2017, v. 56, n. 2, p. 19

By:

Nelson, Rick

Publication type:

Article

Test adds value as Moore's Law recedes.

Published in:

2017

By:

NELSON, RICK

Publication type:

Proceeding

Modular Instruments Address IC Test.

Published in:

EE: Evaluation Engineering, 2012, v. 51, n. 7, p. 18

By:

Nelson, Rick

Publication type:

Article

Performance analysis of the HRC? HPGR in pilot plant.

Published in:

Rem: Revista Escola de Minas, 2016, v. 69, n. 2, p. 227, doi. 10.1590/0370-44672015690124

By:

Oliveira, Renato;
Júnior, Homero Delboni;
Bergerman, Maurício Guimarães

Publication type:

Article

Fault Diagnosis In Vlsi Chips Using Different Strategies.

Published in:

International Journal of Advanced Research in Computer Science, 2012, v. 3, n. 2, p. 309

By:

Sharma, Divya;
Kaushik, B. K.;
Agarwal, R. P.

Publication type:

Article

SUPERCONDUCTING SINGLE-PHOTON DETECTOR ENABLES TIME-RESOLVED EMISSION TESTING OF LOW-VOLTAGE SCALED ICs.

Published in:

Electronic Device Failure Analysis, 2016, v. 18, n. 4, p. 16, doi. 10.31399/asm.edfa.2016-4.p016

By:

Shehata, Andrea Bahgat;
Stellari, Franco;
Song, Peilin

Publication type:

Article

Space Domain Reflectometry for Opens Detection in Stacked-Die Packages.

Published in:

Electronic Device Failure Analysis, 2012, v. 14, n. 3, p. 22, doi. 10.31399/asm.edfa.2012-3.p022

By:

Gaudestad, Jan;
Talanov, Vladimir V.;
Huang, Po Chih

Publication type:

Article

Magnetic Microscopy to Reconstruct 3-D Currents in Complex Systems.

Published in:

Electronic Device Failure Analysis, 2012, v. 14, n. 3, p. 12, doi. 10.31399/asm.edfa.2012-3.p012

By:

Infante, Fulvio

Publication type:

Article

Testing a 32-channel integrated circuit for recording signals of silicon detectors.

Published in:

Instruments & Experimental Techniques, 2012, v. 55, n. 4, p. 456, doi. 10.1134/S0020441212030098

By:

Atkin, E.;
Volkov, Yu.;
Voronin, A.;
Dement'ev, D.;
Il'yushchenko, I.;
Karmanov, D.;
Klyuev, A.;
Kudryashov, I.;
Lobanov, A.;
Podorozhnyi, D.;
Shumikhin, V.

Publication type:

Article