Works matching Cache memory

Results: 1430

Hardware-Based Implementation of Algorithms for Data Replacement in Cache Memory of Processor Cores.

Published in:

Computers (2073-431X), 2024, v. 13, n. 7, p. 166, doi. 10.3390/computers13070166

By:

Titarenko, Larysa;
Kharchenko, Vyacheslav;
Puidenko, Vadym;
Perepelitsyn, Artem;
Barkalov, Alexander

Publication type:

Article

دراسة العوامل المؤثرة بنسبة الإصابة في الذاكرة المخبئية ضمن نظام متعدد المعالجات

Published in:

Tikrit Journal of Engineering Sciences, 2016, v. 23, n. 4, p. 23

By:

عمار علي زقزوق

Publication type:

Article

Memory and Cache Contention Denial-of-Service Attack in Mobile Edge Devices.

Published in:

Applied Sciences (2076-3417), 2021, v. 11, n. 5, p. 2385, doi. 10.3390/app11052385

By:

Cho, Won;
Kong, Joonho;
Leveugle, Régis

Publication type:

Article

ASYNCHRONOUS INSTRUCTION CACHE MEMORY FOR AVERAGE-CASE PERFORMANCE.

Published in:

Journal of Circuits, Systems & Computers, 2014, v. 23, n. 5, p. -1, doi. 10.1142/S0218126614500637

By:

LEE, JE-HOON;
CHO, HYUN GUG

Publication type:

Article

A Cross-Layer Framework for Designing and Optimizing Deeply-Scaled FinFET-Based Cache Memories.

Published in:

Journal of Low Power Electronics & Applications, 2015, v. 5, n. 3, p. 165, doi. 10.3390/jlpea5030165

By:

Shafaei, Alireza;
Shuang Chen;
Yanzhi Wang;
Pedram, Massoud

Publication type:

Article

Some preliminary results of memory cache analysis with the use of non-extensive.

Published in:

Annales UMCS, Informatica, 2016, v. 16, n. 2, p. 43, doi. 10.17951/AI.2016.16.2.43

By:

Strzałka, Dominik

Publication type:

Article

A Performance Comparison of Java Cache Memory Implementations.

Published in:

Gümüshane Üniversitesi Fen Bilimleri Enstitüsü Dergisi, 2020, v. 10, n. 3, p. 844, doi. 10.17714/gumusfenbil.637942

By:

KABAKUŞ, Abdullah Talha

Publication type:

Article

Minimizing the Cache Memory Miss Ratio Using Modified Replacement Algorithm (MCAR).

Published in:

Ingénierie des Systèmes d'Information, 2024, v. 29, n. 2, p. 697, doi. 10.18280/isi.290231

By:

Hussein, Salam Ayad;
Kareem, Mohsin Raad;
George, Dena Nader

Publication type:

Article

Aspects of Cache Memory Simulation using Programs under Windows and UNIX Operating Systems.

Published in:

Journal of Computer Science & Control Systems, 2011, v. 4, n. 2, p. 55

By:

Ovidiu, Novac;
Mihaela, Novac;
Stefan, Vari-Kakas;
Ecaterina, Vladu

Publication type:

Article

A Comparative Study of Simulation Program for Cache Memory Performance Assessment.

Published in:

Journal of Computer Science & Control Systems, 2009, v. 2, n. 2, p. 39

By:

Novac, Ovidiu;
Stefan, Vari-Kakas;
Otto, Poszet;
Mihaela Novac

Publication type:

Article

A cache coherence protocol for distributed memory platforms.

Published in:

Computer Systems Science & Engineering, 2010, v. 25, n. 5, p. 343

By:

Sumoza, Rodolfo;
Castro, Jose Aguilar

Publication type:

Article

Compact and High-Speed Hsiao-Based SEC-DED Codec for Cache Memory.

Published in:

Journal of Circuits, Systems & Computers, 2022, v. 31, n. 1, p. 1, doi. 10.1142/S0218126622500049

By:

Samanta, Jagannath;
Kewat, Akash

Publication type:

Article

Code integrity verification using cache memory monitoring.

Published in:

Information Security Journal: A Global Perspective, 2022, v. 31, n. 2, p. 226, doi. 10.1080/19393555.2021.1902592

By:

Shrivastava, Rajesh Kumar;
Natu, Varun;
Hota, Chittaranjan

Publication type:

Article

DEPENDABILITY ASPECTS REGARDING THE DESIGN OF A CACHE MEMORY.

Published in:

Annals of DAAAM & Proceedings, 2010, p. 645

By:

Novac, O.;
Novac, M. C.;
Vladu, E. E.;
Vari - Kakas, S.;
Mang, G. E.;
Indrie, L.

Publication type:

Article

Optimization of ETL Process in Data Warehouse Through a Combination of Parallelization and Shared Cache Memory.

Published in:

Engineering, Technology & Applied Science Research, 2016, v. 6, n. 6, p. 1241, doi. 10.48084/etasr.849

By:

Masouleh, M. Faridi;
Afshar Kazemi, M. A.;
Alborzi, M.;
Eshlaghy, A. Toloie

Publication type:

Article

VMBKS: a shared memory cache system based on booting kernel in cloud.

Published in:

Journal of Supercomputing, 2019, v. 75, n. 1, p. 4, doi. 10.1007/s11227-015-1554-1

By:

Shi, Xiang;
Liao, Xiaofei;
Zheng, Dayang;
Jin, Hai;
Liu, Haikun

Publication type:

Article

Quantum cache memory: a framework for enhancing DNA analysis through quantum computing.

Published in:

Quantum Information Processing, 2024, v. 23, n. 12, p. 1, doi. 10.1007/s11128-024-04595-4

By:

Bhabhatsatam, Bhattaraprot;
Smanchat, Sucha

Publication type:

Article

Cache-Sensitive Memory Layout for Dynamic Binary Trees.

Published in:

Computer Journal, 2016, v. 59, n. 5, p. 630, doi. 10.1093/comjnl/bxv090

By:

SAIKKONEN, RIKU;
SOISALON-SOININEN, ELJAS

Publication type:

Article

Cache Memory Design for Single Bit Architecture with Different Sense Amplifiers.

Published in:

Computers, Materials & Continua, 2022, v. 73, n. 2, p. 2313, doi. 10.32604/cmc.2022.029019

By:

Agrawal, Reeya;
Kumar, Anjan;
AlQahtani, Salman A.;
Maashi, Mashael;
Khalaf, Osamah Ibrahim;
Aldhyani, Theyazn H. H.

Publication type:

Article

Dual-Port Content Addressable Memory for Cache Memory Applications.

Published in:

Computers, Materials & Continua, 2022, v. 70, n. 3, p. 4583, doi. 10.32604/cmc.2022.020529

By:

Abumwais, Allam;
Amirjanov, Adil;
Uyar, Kaan;
Eleyat, Mujahed

Publication type:

Article

AN INTEGRATED SIMULATION INFRASTRUCTURE FOR THE ENTIRE MEMORY HIERARCHY: CACHE , DRAM, NONVOLATI LE MEMORY, AND DISK.

Published in:

Intel Technology Journal, 2013, v. 17, n. 1, p. 184

By:

Stevens, Jim;
Tschirhart, Paul;
Mu-Tien Chang;
Bhati, Ishwar;
Enns, Peter;
Greensky, James;
Chisti, Zeshan;
Shih-Lien Lu;
Jacob, Bruce

Publication type:

Article

Fast In-Memory Key–Value Cache System with RDMA.

Published in:

Journal of Circuits, Systems & Computers, 2019, v. 28, n. 5, p. N.PAG, doi. 10.1142/S0218126619500749

By:

Chen, Wei;
Yu, Songping;
Wang, Zhiying

Publication type:

Article

Cost aware cache replacement policy in shared last-level cache for hybrid memory based fog computing.

Published in:

Enterprise Information Systems, 2018, v. 12, n. 4, p. 435, doi. 10.1080/17517575.2017.1295321

By:

Jia, Gangyong;
Han, Guangjie;
Wang, Hao;
Wang, Feng

Publication type:

Article

Multiple cache recovery task cannot determine memory mechanisms.

Published in:

Learning & Behavior, 2024, v. 52, n. 4, p. 291, doi. 10.3758/s13420-023-00616-x

By:

Pravosudov, Vladimir V.

Publication type:

Article

Dynamic Partitioning of Shared Cache Memory.

Published in:

Journal of Supercomputing, 2004, v. 28, n. 1, p. 7, doi. 10.1023/B:SUPE.0000014800.27383.8f

By:

Suh, G. E.;
Rudolph, L.;
Devadas, S.

Publication type:

Article

ENHANCED PERFORMANCE OF CACHE MEMORY.

Published in:

International Journal of Advanced Research in Computer Science, 2018, v. 9, n. 3, p. 34, doi. 10.26483/ijarcs.v9i3.5952

By:

Nishtha;
Agrahari, Komal

Publication type:

Article

An efficient racetrack memory for L2 cache in GPGPUs.

Published in:

Computer Systems Science & Engineering, 2017, v. 32, n. 6, p. 461

By:

Atoofian, Ehsan;
Saghir, Ahsan

Publication type:

Article

Word Sense Disambiguation Model with a Cache-Like Memory Module.

Published in:

Journal of Donghua University (English Edition), 2021, v. 38, n. 4, p. 333, doi. 10.19884/j.1672-5220.202012114

By:

LIN Qian;
LIU Xin;
XIN Chunlei;
ZHANG Haiying;
ZENG Hualin;
ZHANG Tonghui;
SU Jinsong

Publication type:

Article

Dynamic Partitioned Cache Memory for Real-Time MPSoCs with Mixed Criticality.

Published in:

Journal of Circuits, Systems & Computers, 2016, v. 25, n. 6, p. -1, doi. 10.1142/S0218126616500626

By:

Chen, Gang;
Huang, Kai;
Cheng, Long;
Hu, Biao;
Knoll, Alois

Publication type:

Article

Asynchronous Adaptive Delay Tolerant Index Cache Using In-memory Delta Cell.

Published in:

Informatica (03505596), 2015, v. 39, n. 4, p. 443

By:

Kun Ma;
Bo Yang

Publication type:

Article

A Quantitative Study of Locality in GPU Caches for Memory-Divergent Workloads.

Published in:

International Journal of Parallel Programming, 2022, v. 50, n. 2, p. 189, doi. 10.1007/s10766-022-00729-2

By:

Lal, Sohan;
Varma, Bogaraju Sharatchandra;
Juurlink, Ben

Publication type:

Article

Dynamic Tag Reduction for Low-Power Caches in Embedded Systems with Virtual Memory.

Published in:

International Journal of Parallel Programming, 2007, v. 35, n. 2, p. 157, doi. 10.1007/s10766-006-0030-1

By:

Petrov, Peter;
Orailoglu, Alex

Publication type:

Article

Proposed Design of 1 KB Memory Array Structure for Cache Memories.

Published in:

Wireless Personal Communications, 2019, v. 109, n. 2, p. 823, doi. 10.1007/s11277-019-06593-7

By:

Gavaskar, K.;
Ragupathy, U. S.;
Malini, V.

Publication type:

Article

Reliability Increasing Method Using a SEC-DED Hsiao Code to Cache Memories, Implemented with FPGA Circuits.

Published in:

Journal of Computer Science & Control Systems, 2011, v. 4, n. 2, p. 59

By:

Ovidiu, Novac;
Janos, Sztrik;
Stefan, Vari-Kakas;
Kim Che-Soong

Publication type:

Article

The memory behavior of cache oblivious stencil computations.

Published in:

Journal of Supercomputing, 2007, v. 39, n. 2, p. 93, doi. 10.1007/s11227-007-0111-y

By:

Frigo, Matteo;
Strumpen, Volker

Publication type:

Article

Memory Map: A Multiprocessor Cache Simulator.

Published in:

Journal of Electrical & Computer Engineering, 2012, p. 1, doi. 10.1155/2012/365091

By:

Mittal, Shaily;
Nitin

Publication type:

Article

Analytical Model For a Multiprocessor With Private Caches And Shared Memory.

Published in:

International Journal of Computers, Communications & Control, 2008, v. 3, n. 2, p. 172, doi. 10.15837/ijccc.2008.2.2385

By:

Nikolov, Angel Vassilev

Publication type:

Article

An Enhancement of Futures Runtime in Presence of Cache Memory Hierarchy.

Published in:

Journal of Computing & Information Technology, 2008, v. 16, n. 4, p. 339, doi. 10.2498/cit.1001403

By:

Botinčan, Matko;
Runje, Davor

Publication type:

Article

Snooping protocol proposal to Improve Cache Performance via Reducing Memory Access Time.

Published in:

Diyala Journal for Pure Science, 2019, v. 15, n. 3, p. 1, doi. 10.24237/djps.15.03.379C

By:

Hasan, Rehab Flaih;
Abdulkareem, Maha;
Al-Nakshabandi, Abeer Diaa

Publication type:

Article

Cache Memory: An Analysis on Replacement Algorithms and Optimization Techniques.

Published in:

Mehran University Research Journal of Engineering & Technology, 2017, v. 36, n. 4, p. 831, doi. 10.22581/muet1982.1704.08

By:

JAVAID, QAISAR;
ZAFAR, AYESHA;
AWAIS, MUHAMMAD;
SHAH, MUNAM ALI

Publication type:

Article

Keep the PokerFace on! Thwarting cache side channel attacks by memory bus monitoring and cache obfuscation.

Published in:

Journal of Cloud Computing (2192-113X), 2017, v. 6, n. 1, p. 1, doi. 10.1186/s13677-017-0101-4

By:

Raj, Arun;
Dharanipragada, Janakiram

Publication type:

Article

An Improved Memory Cache Management Study Based on Spark.

Published in:

Computers, Materials & Continua, 2018, v. 56, n. 3, p. 415, doi. 10.3970/cmc.2018.03716

By:

Suzhen Wang;
Yanpiao Zhang;
Lu Zhang;
Ning Cao;
Chaoyi Pang

Publication type:

Article

Lightweight and Accurate Memory Allocation in Key-Value Cache.

Published in:

International Journal of Parallel Programming, 2019, v. 47, n. 3, p. 451, doi. 10.1007/s10766-018-0616-4

By:

Pan, Cheng;
Zhou, Lan;
Luo, Yingwei;
Wang, Xiaolin;
Wang, Zhenlin

Publication type:

Article

UHNVM: A Universal Heterogeneous Cache Design with Non-Volatile Memory.

Published in:

Electronics (2079-9292), 2021, v. 10, n. 15, p. 1760, doi. 10.3390/electronics10151760

By:

Li, Xiaochang;
Zhai, Zhengjun

Publication type:

Article

Studies on the energy and deep memory behaviour of a cache-oblivious, task-based hyperbolic PDE solver.

Published in:

International Journal of High Performance Computing Applications, 2019, v. 33, n. 5, p. 973, doi. 10.1177/1094342019842645

By:

Charrier, Dominic E;
Hazelwood, Benjamin;
Tutlyaeva, Ekaterina;
Bader, Michael;
Dumbser, Michael;
Kudryavtsev, Andrey;
Moskovsky, Alexander;
Weinzierl, Tobias;
Mascagni, Michael

Publication type:

Article

A page replacement algorithm based on a fuzzy approach to improve cache memory performance.

Published in:

Soft Computing - A Fusion of Foundations, Methodologies & Applications, 2020, v. 24, n. 2, p. 955, doi. 10.1007/s00500-019-04624-w

By:

Akbari Bengar, Davood;
Ebrahimnejad, Ali;
Motameni, Homayun;
Golsorkhtabaramiri, Mehdi

Publication type:

Article

LDF (less dirty first): dirtiness-aware cache replacement policy for PCM main memory.

Published in:

Electronics Letters (Wiley-Blackwell), 2013, v. 49, n. 25, p. 1607, doi. 10.1049/el.2013.1418

By:

S. Yoo;
E. Lee;
H. Bahn

Publication type:

Article

RELIABILITTY ASPECTS REGARDING THE CACHE LEVEL OF A MEMORY HIERARCHY.

Published in:

Annals of DAAAM & Proceedings, 2009, p. 1137

By:

NOVAC, Ovidiu;
VARI - KAKAS, Stefan;
NOVAC, Mihaela;
INDRIE, Liliana;
VLADU, Ecaterina

Publication type:

Article

An ESL Approach for Energy Consumption Analysis of Cache Memories in SoC Platforms.

Published in:

International Journal of Reconfigurable Computing, 2011, p. 1, doi. 10.1155/2011/219497

By:

Silva-Filho, Abel G.;
Cordeiro, Filipe R.;
Araújo, Cristiano C.;
Sarmento, Adriano;
Gomes, Millena;
Barros, Edna;
Lima, Manoel E

Publication type:

Article

Hierarchical Binary Set Partitioning in Cache Memories.

Published in:

Journal of Supercomputing, 2005, v. 31, n. 2, p. 185, doi. 10.1007/s11227-005-0106-5

By:

Zarandi, Hamid Reza;
Sarbazi-Azad, Hamid

Publication type:

Article