Digital VLSI Algorithms and Architectures for Support Vector Machines.
- Published in:
- International Journal of Neural Systems, 2000, v. 10, n. 3, p. 159, doi. 10.1142/S0129065700000144
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- Publication type:
- Article
Works matching IS 01290657 AND DT 2000 AND VI 10 AND IP 3
Results: 8
1
2
Implementation of a Pulse Coupled Neural Network in FPGA.
- Published in:
- International Journal of Neural Systems, 2000, v. 10, n. 3, p. 171, doi. 10.1142/S0129065700000156
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- Publication type:
- Article
3
A Programmable VLSI Filter Architecture for Application in Real-Time Vision Processing Systems.
- Published in:
- International Journal of Neural Systems, 2000, v. 10, n. 3, p. 179, doi. 10.1016/S0129-0657(00)00016-8
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- Publication type:
- Article
4
VLSI Implementation of Neural Networks.
- Published in:
- International Journal of Neural Systems, 2000, v. 10, n. 3, p. 191, doi. 10.1142/S012906570000017X
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- Publication type:
- Article
5
Convergence Analysis of Cascade Error Projection - An Efficient Learning Algorithm for Hardware Implementation.
- Published in:
- International Journal of Neural Systems, 2000, v. 10, n. 3, p. 199, doi. 10.1142/S0129065700000181
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- Publication type:
- Article
6
Simulink-Based HW/SW Codesign of Embedded Neuro-Fuzzy Systems.
- Published in:
- International Journal of Neural Systems, 2000, v. 10, n. 3, p. 211, doi. 10.1142/S0129065700000193
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- Publication type:
- Article
7
Automating Parallel Implementation of Neural Learning Algorithms.
- Published in:
- International Journal of Neural Systems, 2000, v. 10, n. 3, p. 227, doi. 10.1142/S012906570000020X
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- Publication type:
- Article
8
FPNA: Interaction Between FPGA and Neural Computation.
- Published in:
- International Journal of Neural Systems, 2000, v. 10, n. 3, p. 243, doi. 10.1142/S0129065700000211
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- Publication type:
- Article