Works matching DE "LOOP tiling (Computer science)"


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    APERIODIC TILING USING P SYSTEM.

    Published in:
    ICTACT Journal on Soft Computing, 2015, v. 5, n. 3, p. 929, doi. 10.21917/ijsc.2015.0130
    By:
    • Jebasingh, S.;
    • Robinson, T.;
    • Nagar, Atulya K.
    Publication type:
    Article
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    A compiler for multiple memory models.

    Published in:
    Concurrency & Computation: Practice & Experience, 2004, v. 16, n. 2/3, p. 197, doi. 10.1002/cpe.771
    By:
    • Midkiff, S. P.;
    • Lee, J.;
    • Padua, D. A.
    Publication type:
    Article
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    Memory Cost Due to Anticipated Broadcast.

    Published in:
    Parallel Processing Letters, 2000, v. 10, n. 2/3, p. 177, doi. 10.1142/S0129626400000184
    By:
    • Loechner, Vincent;
    • Mongenet, Catherine;
    • Darte, A.;
    • Robert, Y.
    Publication type:
    Article
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    Loop Shifting for Loop Compaction.

    Published in:
    International Journal of Parallel Programming, 2000, v. 28, n. 5, p. 499, doi. 10.1023/A:1007506711786
    By:
    • Darte, Alain;
    • Huard, Guillaume
    Publication type:
    Article
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    Low Noise Amplifiers with Double Loop Feedback.

    Published in:
    Circuits, Systems & Signal Processing, 2013, v. 32, n. 2, p. 541, doi. 10.1007/s00034-012-9496-9
    By:
    • Martins, Miguel;
    • Hartingsveldt, Koen;
    • Fernandes, Jorge;
    • Silva, Manuel;
    • Verhoeven, Chris
    Publication type:
    Article