Works matching DE "COMPILERS (Computer programs)"
Results: 746
ALIC: A Low Overhead Compiler Optimization Prediction Model.
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- Wireless Personal Communications, 2018, v. 103, n. 1, p. 809, doi. 10.1007/s11277-018-5479-x
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- Article
基于 FME 的矿山遥感监测矢量数据图属一致性检查方法.
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- Remote Sensing for Natural Resources, 2022, v. 34, n. 1, p. 293, doi. 10.6046/zrzyyg.2021101
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- Article
A COMPUTATION STUDY ON START PROCEDURES, BASIS CHANGE CRITERIA, AND SOLUTION ALGORITHMS FOR TRANSPORTATION PROBLEMS.
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- Management Science, 1974, v. 20, n. 5, p. 793, doi. 10.1287/mnsc.20.5.783
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- Article
地铁正线联锁表自动生成软件的研究与设计.
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- Railway Signalling & Communication Engineering, 2022, v. 19, n. 9, p. 95, doi. 10.3969/j.issn.1673-4440.2022.09.019
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- Article
信号设备自动编译产品的研究与实现.
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- Railway Signalling & Communication Engineering, 2022, v. 19, n. 3, p. 21, doi. 10.3969/j.issn.1673-4440.2022.03.005
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- Article
Loop optimizations in C and C++ compilers: an overview.
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- Annales Mathematicae et Informaticae, 2020, v. 51, p. 113, doi. 10.33039/ami.2020.07.003
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- Article
A Hybrid Machine Learning Model for Code Optimization.
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- International Journal of Parallel Programming, 2023, v. 51, n. 6, p. 309, doi. 10.1007/s10766-023-00758-5
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- Article
A Methodology for Efficient Tile Size Selection for Affine Loop Kernels.
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- International Journal of Parallel Programming, 2022, v. 50, n. 3/4, p. 405, doi. 10.1007/s10766-022-00734-5
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- Article
The Celerity High-level API: C++20 for Accelerator Clusters.
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- International Journal of Parallel Programming, 2022, v. 50, n. 3/4, p. 341, doi. 10.1007/s10766-022-00731-8
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- Article
Enhancing the Effectiveness of Inlining in Automatic Parallelization.
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- International Journal of Parallel Programming, 2022, v. 50, n. 1, p. 65, doi. 10.1007/s10766-021-00722-1
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- Article
Bounds Checking on GPU.
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- International Journal of Parallel Programming, 2021, v. 49, n. 6, p. 761, doi. 10.1007/s10766-021-00703-4
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- Article
Compiler-assisted Operator Template Library for DNN Accelerators.
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- International Journal of Parallel Programming, 2021, v. 49, n. 5, p. 628, doi. 10.1007/s10766-021-00701-6
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- Article
Scaled Static Analysis and IP Reuse for Out-of-Order Parallel SystemC Simulation.
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- International Journal of Parallel Programming, 2021, v. 49, n. 2, p. 200, doi. 10.1007/s10766-020-00668-w
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- Article
Massively Parallel Rule-Based Interpreter Execution on GPUs Using Thread Compaction.
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- International Journal of Parallel Programming, 2020, v. 48, n. 4, p. 675, doi. 10.1007/s10766-020-00670-2
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- Article
Resource-Aware Data Parallel Array Processing.
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- International Journal of Parallel Programming, 2020, v. 48, n. 4, p. 652, doi. 10.1007/s10766-020-00664-0
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- Article
Source-to-Source Parallelization Compilers for Scientific Shared-Memory Multi-core and Accelerated Multiprocessing: Analysis, Pitfalls, Enhancement and Potential.
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- International Journal of Parallel Programming, 2020, v. 48, n. 1, p. 1, doi. 10.1007/s10766-019-00640-3
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- Article
PolyJIT: Polyhedral Optimization Just in Time.
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- International Journal of Parallel Programming, 2019, v. 47, n. 5/6, p. 874, doi. 10.1007/s10766-018-0597-3
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- Article
Guest Editorial: Special Issue on Computing Frontiers.
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- International Journal of Parallel Programming, 2018, v. 46, n. 2, p. 333, doi. 10.1007/s10766-018-0556-z
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- Article
Automated Compiler Optimization of Multiple Vector Loads/Stores.
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- International Journal of Parallel Programming, 2018, v. 46, n. 2, p. 471, doi. 10.1007/s10766-016-0485-7
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- Article
High-Level Programming for Many-Cores Using C++14 and the STL.
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- International Journal of Parallel Programming, 2018, v. 46, n. 1, p. 23, doi. 10.1007/s10766-017-0497-y
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- Article
Runtime Vectorization Transformations of Binary Code.
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- International Journal of Parallel Programming, 2017, v. 45, n. 6, p. 1536, doi. 10.1007/s10766-016-0480-z
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- Article
Panda: A Compiler Framework for Concurrent CPU $$+$$ GPU Execution of 3D Stencil Computations on GPU-accelerated Supercomputers.
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- International Journal of Parallel Programming, 2017, v. 45, n. 3, p. 711, doi. 10.1007/s10766-016-0454-1
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- Article
pocl: A Performance-Portable OpenCL Implementation.
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- International Journal of Parallel Programming, 2015, v. 43, n. 5, p. 752, doi. 10.1007/s10766-014-0320-y
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- Article
Compiler Infrastructure.
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- 2013
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- Publication type:
- Editorial
Compiler-Assisted Checkpointing of Parallel Codes: The Cetus and LLVM Experience.
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- International Journal of Parallel Programming, 2013, v. 41, n. 6, p. 782, doi. 10.1007/s10766-012-0231-8
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- Article
Extensible Recognition of Algorithmic Patterns in DSP Programs for Automatic Parallelization.
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- International Journal of Parallel Programming, 2013, v. 41, n. 6, p. 806, doi. 10.1007/s10766-012-0229-2
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- Article
The Cetus Source-to-Source Compiler Infrastructure: Overview and Evaluation.
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- International Journal of Parallel Programming, 2013, v. 41, n. 6, p. 753, doi. 10.1007/s10766-012-0211-z
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- Article
The Implementation of a High Performance GPGPU Compiler.
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- International Journal of Parallel Programming, 2013, v. 41, n. 6, p. 768, doi. 10.1007/s10766-012-0228-3
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- Article
Experiences Developing the OpenUH Compiler and Runtime Infrastructure.
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- International Journal of Parallel Programming, 2013, v. 41, n. 6, p. 825, doi. 10.1007/s10766-012-0230-9
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- Article
Efficient Sequential Consistency Using Conditional Fences.
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- International Journal of Parallel Programming, 2012, v. 40, n. 1, p. 84, doi. 10.1007/s10766-011-0176-3
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- Article
Probabilistic Alias Analysis of Executable Code.
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- International Journal of Parallel Programming, 2011, v. 39, n. 6, p. 663, doi. 10.1007/s10766-010-0157-y
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- Article
DAFT: Decoupled Acyclic Fault Tolerance.
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- International Journal of Parallel Programming, 2012, v. 40, n. 1, p. 118, doi. 10.1007/s10766-011-0183-4
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- Article
Guest Editorial: Parallel and Distributed Computing.
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- International Journal of Parallel Programming, 2011, v. 39, n. 5, p. 582, doi. 10.1007/s10766-011-0166-5
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- Article
ACOTES Project: Advanced Compiler Technologies for Embedded Streaming.
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- International Journal of Parallel Programming, 2011, v. 39, n. 3, p. 397, doi. 10.1007/s10766-010-0132-7
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- Article
Milepost GCC: Machine Learning Enabled Self-tuning Compiler.
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- International Journal of Parallel Programming, 2011, v. 39, n. 3, p. 296, doi. 10.1007/s10766-010-0161-2
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- Article
Comparison of OpenMP 3.0 and Other Task Parallel Frameworks on Unbalanced Task Graphs.
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- International Journal of Parallel Programming, 2010, v. 38, n. 5/6, p. 341, doi. 10.1007/s10766-010-0140-7
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- Article
Guest Editors’ Editorial: Special Issue on the Second International Workshop on Microgrids.
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- 2010
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- Publication type:
- Editorial
Compilation Techniques for High Level Parallel Code.
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- International Journal of Parallel Programming, 2010, v. 38, n. 1, p. 4, doi. 10.1007/s10766-009-0118-5
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- Article
CLOMP: Accurately Characterizing OpenMP Application Overheads.
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- International Journal of Parallel Programming, 2009, v. 37, n. 3, p. 250, doi. 10.1007/s10766-009-0096-7
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- Article
An Optimizing Compiler for Parallel Chemistry Simulations.
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- International Journal of Parallel Programming, 2009, v. 37, n. 2, p. 127, doi. 10.1007/s10766-008-0087-0
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- Publication type:
- Article
A Study of Process Arrival Patterns for MPI Collective Operations.
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- International Journal of Parallel Programming, 2008, v. 36, n. 6, p. 543, doi. 10.1007/s10766-008-0070-9
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- Publication type:
- Article
A Compile/Run-time Environment for the Automatic Transformation of Linked List Data Structures.
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- International Journal of Parallel Programming, 2008, v. 36, n. 6, p. 592, doi. 10.1007/s10766-008-0085-2
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- Article
A Compiler Intermediate Representation for Reconfigurable Fabrics.
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- International Journal of Parallel Programming, 2008, v. 36, n. 5, p. 493, doi. 10.1007/s10766-008-0080-7
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- Publication type:
- Article
A Case Study on Compiler Optimizations for the Intel<sup>®</sup> Core<sup>TM</sup> 2 Duo Processor.
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- International Journal of Parallel Programming, 2008, v. 36, n. 6, p. 571, doi. 10.1007/s10766-008-0071-8
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- Publication type:
- Article
Guest Editor Introduction: Special Issue on Embedded Processors.
- Published in:
- 2008
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- Publication type:
- Editorial
Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures.
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- International Journal of Parallel Programming, 2007, v. 35, n. 6, p. 507, doi. 10.1007/s10766-007-0045-2
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- Article
OpenMP Implementation of SPICE3 Circuit Simulator.
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- International Journal of Parallel Programming, 2007, v. 35, n. 5, p. 493, doi. 10.1007/s10766-007-0053-2
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- Publication type:
- Article
Nested Parallelization with OpenMP.
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- International Journal of Parallel Programming, 2007, v. 35, n. 5, p. 459, doi. 10.1007/s10766-007-0054-1
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- Publication type:
- Article
Semi-Automatic Composition of Loop Transformations for Deep Parallelism and Memory Hierarchies.
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- International Journal of Parallel Programming, 2006, v. 34, n. 3, p. 261, doi. 10.1007/s10766-006-0012-3
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- Publication type:
- Article
A Spill Code Minimization Technique—Application in the Metrowerks StarCore C Compiler.
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- International Journal of Parallel Programming, 2004, v. 32, n. 6, p. 475, doi. 10.1023/B:IJPP.0000042083.16504.5e
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- Publication type:
- Article