Works matching DE "ANALOG multipliers"

Results: 223

Variational integrators of higher order for flexible multibody systems.

Published in:

PAMM: Proceedings in Applied Mathematics & Mechanics, 2015, v. 15, n. 1, p. 43, doi. 10.1002/pamm.201510012

By:

Bartelt, Matthias;
Groß, Michael

Publication type:

Article

A New Technique for Measuring the Nonlinear Distortion of Analog Multipliers.

Published in:

Measurement Techniques, 2017, v. 60, n. 3, p. 279, doi. 10.1007/s11018-017-1186-3

By:

Zen'kovich, A.;
Ballo, V.;
Dobrovol'skii, V.

Publication type:

Article

Precision and information indicators of the measurement channels of an engine expert system.

Published in:

Measurement Techniques, 2011, v. 54, n. 6, p. 687, doi. 10.1007/s11018-011-9787-8

By:

Dobrolyubov, I.

Publication type:

Article

A-DSCNN: Depthwise Separable Convolutional Neural Network Inference Chip Design Using an Approximate Multiplier.

Published in:

Chips, 2023, v. 2, n. 3, p. 159, doi. 10.3390/chips2030010

By:

Shang, Jin-Jia;
Phipps, Nicholas;
Wey, I-Chyn;
Teo, Tee Hui

Publication type:

Article

SPEED VARIATIONS IN CAGE INDUCTION MOTORS UNDER SINUSOIDAL VOLTAGE MODULATION.

Published in:

Scientific Journal of Gdynia Maritme University, 2022, n. 124, p. 31, doi. 10.26408/124.03

By:

Gnaciński, Piotr;
Hallmann, Damian

Publication type:

Article

A generic online acceleration scheme for optimization algorithms via relaxation and inertia.

Published in:

Optimization Methods & Software, 2019, v. 34, n. 2, p. 383, doi. 10.1080/10556788.2017.1396601

By:

Iutzeler, F.;
Hendrickx, J. M.

Publication type:

Article

A Lagrangean-based decomposition approach for the link constrained Steiner tree problem<sup>**</sup>.

Published in:

Optimization Methods & Software, 2018, v. 33, n. 3, p. 650, doi. 10.1080/10556788.2017.1392518

By:

Di Puglia Pugliese, Luigi;
Gaudioso, Manlio;
Guerriero, Francesca;
Miglionico, Giovanna

Publication type:

Article

应用于非负稀疏信号重构的交替方向乘子法.

Published in:

Journal of Signal Processing, 2015, v. 31, n. 11, p. 1411

By:

闵刚;
张雄伟;
杨吉斌;
胡永刚;
潘竟峰

Publication type:

Article

The recursive multiplexer based multipliers.

Published in:

International Journal of Electronics Letters, 2020, v. 8, n. 4, p. 389, doi. 10.1080/21681724.2019.1625964

By:

Chen, Po-Yueh;
Huang, Yao-Ting

Publication type:

Article

Design of Low-Voltage and Low-Power DTMOS Based Analog Multiplier Utilizing Current Squarer.

Published in:

International Journal of Electronics Letters, 2021, v. 9, n. 1, p. 1, doi. 10.1080/21681724.2021.1889041

By:

Yildirim, Melih

Publication type:

Article

Novel, low-supply, differential XOR/XNOR with rail-to-rail swing, for hamming-code generation.

Published in:

International Journal of Electronics Letters, 2018, v. 6, n. 3, p. 272, doi. 10.1080/21681724.2017.1357761

By:

Sarada, Musala;
Srinivasulu, Avireni;
Pal, Dipankar

Publication type:

Article

Computationally efficient image reconstruction algorithm for electrical capacitance tomography.

Published in:

Transactions of the Institute of Measurement & Control, 2019, v. 41, n. 3, p. 631, doi. 10.1177/0142331218763013

By:

Tong, Guowei;
Liu, Shi;
Liu, Sha

Publication type:

Article

FPGA Implementation of Multiplierless DCT/IDCT Chip.

Published in:

Al-Rafadain Engineering Journal, 2011, v. 19, n. 4, p. 55

By:

Mahmood, Ahlam Fadhil;
Sali, Abdulkreem Mohameed

Publication type:

Article

Analog Computing and a Hybrid Approach to the Element Base of Artificial Intelligence Applications.

Published in:

International Review of Automatic Control, 2020, v. 13, n. 5, p. 206, doi. 10.15866/ireaco.v13i5.19142

By:

Zhigang Wang;
Al Said, Nidal

Publication type:

Article

A novel accelerator for dual-precision floating-point multiplication.

Published in:

Australian Journal of Electrical & Electronic Engineering, 2014, v. 11, n. 2, p. 175, doi. 10.7158/E13-086.2014.11.2

By:

Pham, T.;
Wang, Y.;
Li, R.

Publication type:

Article

Control of High-Speed Interpolating DACs.

Published in:

EE: Evaluation Engineering, 2005, v. 44, n. 11, p. 20

By:

Hames, Scott

Publication type:

Article

A High Speed, Optimized Multiplier Architecture for a DF-ECC Processor.

Published in:

International Journal of Simulation: Systems, Science & Technology, 2013, v. 14, n. 2, p. 35

By:

Shylashree, Nagaraja;
Sridhar, Venugopalachar

Publication type:

Article

High Performance Modified Static Segment Approximate Multiplier based on Significance Probability.

Published in:

Journal of Electronic Testing, 2018, v. 34, n. 5, p. 607, doi. 10.1007/s10836-018-5748-3

By:

Jothin, R.;
Vasanthanayaki, C.

Publication type:

Article

Design of Low-Power Approximate Logarithmic Multipliers with Improved Accuracy.

Published in:

Journal of Applied Research in Electrical Engineering, 2023, v. 2, n. 1, p. 95, doi. 10.22055/jaree.2021.36119.1018

By:

Nezhad, Mojtaba Arab;
Mahani, Ali

Publication type:

Article

A DTMOS based Four-Quadrant Analog Multiplier.

Published in:

Electrica, 2020, v. 20, n. 2, p. 207, doi. 10.5152/electrica.2020.20019

By:

Özer, Emre

Publication type:

Article

Compact Bandpass Filter with Sharp Out-of-band Rejection and its Application.

Published in:

Applied Computational Electromagnetics Society Journal, 2017, v. 32, n. 3, p. 249

By:

Lixue Zhou;
YingZeng Yin;
Wei Hu;
Xi Yang

Publication type:

Article

An absolute intensity beam monitor.

Published in:

Instruments & Experimental Techniques, 2016, v. 59, n. 4, p. 536, doi. 10.1134/S0020441216030167

By:

Kalinin, A.;
Kokovin, V.;
Kryshkin, V.;
Skvortsov, V.

Publication type:

Article

Single VDCC Based Memcapacitor Emulator Circuit without Using Passive Elements and Analog Multiplier.

Published in:

Indian Journal of Pure & Applied Physics, 2024, v. 62, n. 4, p. 310, doi. 10.56042/ijpap.v62i4.6573

By:

Korkmaz, Muhammet Oguz;
Sagbas, Mehmet;
Babacan, Yunus;
Yesil, Abdullah

Publication type:

Article

CMOS Analog Multipliers: Low Power Design Strategies and the Impact of Threshold Voltage Variations.

Published in:

Journal of Mines, Metals & Fuels, 2023, v. 71, n. 4, p. 502, doi. 10.18311/jmmf/2023/33921

By:

Vijay, Ashish;
Duari, Chusen;
Sharma, Mohit Kumar;
Garg, Lokesh;
Singh, Amit Kumar

Publication type:

Article

Efficient Realization of BCD Multipliers Using FPGAs.

Published in:

International Journal of Reconfigurable Computing, 2017, p. 1, doi. 10.1155/2017/2410408

By:

Gao, Shuli;
Al-Khalili, Dhamin;
Langlois, J. M. Pierre;
Chabini, Noureddine

Publication type:

Article

Performance-Oriented Manufacturability Analysis of a 5 GHz Satellite Oscillator.

Published in:

International Review of Mechanical Engineering, 2012, v. 6, n. 7, p. 1461

By:

Eskelinen, Harri;
Eskelinen, Pekka

Publication type:

Article

Multi-arc surfacing with coated electrodes.

Published in:

Welding International, 2010, v. 24, n. 2, p. 144, doi. 10.1080/09507110903292163

By:

Meister, R.A.;
Meister, A.R.;
Bezrukikh, A.A.

Publication type:

Article

INPUT-OUTPUT MULTIPLIERS: SOME THEORETICAL COMMENTS.

Published in:

Journal of Regional Science, 1969, v. 9, n. 2, p. 309, doi. 10.1111/j.1467-9787.1969.tb01343.x

By:

Bradley, Iver E.;
Gander, James P.

Publication type:

Article

A novel topology for four-quadrant GaAs monolithic multipliers.

Published in:

Microwave & Optical Technology Letters, 1999, v. 21, n. 4, p. 277, doi. 10.1002/(SICI)1098-2760(19990520)21:4<277::AID-MOP14>3.0.CO;2-K

By:

Centurelli, Francesco;
Trifiletti, Alessandro

Publication type:

Article

AN ON-WAFER METHOD FOR C-V CHARACTERIZATION OF HETEROSTRUCTURE DIODES.

Published in:

Microwave & Optical Technology Letters, 1995, v. 9, n. 2, p. 63, doi. 10.1002/mop.4650090202

By:

Stake, Jan;
Grönqvist, Hans

Publication type:

Article

POLARIZATION-ENCODED OPTICAL SHADOW CASTING: AN EFFICIENT MULTIPLIER DESIGN.

Published in:

Microwave & Optical Technology Letters, 1991, v. 4, n. 8, p. 328, doi. 10.1002/mop.4650040815

By:

Ahmed, Jamal U.;
Awwal, Abdul Ahad S.

Publication type:

Article

QUANTUM-WELL AND QUANTUM-BARRIER DIODES FOR GENERATING SUBMILLIMETER WAVE POWER.

Published in:

Microwave & Optical Technology Letters, 1991, v. 4, n. 1, p. 33, doi. 10.1002/mop.4650040111

By:

Grönqvist, Hans;
Kollberg, Erik;
Rydberg, Anders

Publication type:

Article

A parallel multi‐block alternating direction method of multipliers for tensor completion.

Published in:

IET Image Processing (Wiley-Blackwell), 2021, v. 15, n. 13, p. 3053, doi. 10.1049/ipr2.12289

By:

Zhu, Hu;
Wang, Zhongyang;
Yan, Taiyu;
Yu, Yu‐Feng;
Deng, Lizhen;
Bao, Bing‐Kun

Publication type:

Article

An Analog of Multiplier Sequences for the Set of Totally Positive Sequences.

Published in:

Journal of Mathematical Physics, Analysis, Geometry (18129471), 2024, v. 20, n. 3, p. 353

By:

Katkova, Olga;
Vishnyakova, Anna

Publication type:

Article

An Energy-efficient and Accuracy-adjustable bfloat16 Multiplier.

Published in:

Informacije MIDEM: Journal of Microelectronics, Electronic Components & Materials, 2023, v. 53, n. 2, p. 79, doi. 10.33180/InfMIDEM2023.203

By:

Pilipović, Ratko;
Bulić, Patricio;
Lotrič, Uroš

Publication type:

Article

Practical Floating Capacitance Multiplier Implementation with Commercially Available IC LT1228s.

Published in:

Informacije MIDEM: Journal of Microelectronics, Electronic Components & Materials, 2021, v. 51, n. 1, p. 85, doi. 10.33180/InfMIDEM2021.106

By:

Roongmuanpha, Natchanai;
Tangsrirat, Worapong

Publication type:

Article

DTMOS Based High Bandwidth Four-Quadrant Analog Multiplier.

Published in:

Informacije MIDEM: Journal of Microelectronics, Electronic Components & Materials, 2020, v. 50, n. 2, p. 137, doi. 10.33180/InfMIDEM2020.206

By:

Başak, Muhammed Emin;
Özer, Emre;
Kaçar, Firat;
Özenli, Deniz

Publication type:

Article

Electronically Adjustable Capacitance Multiplier Circuit with a Single Voltage Differencing Gain Amplifier (VDGA).

Published in:

Informacije MIDEM: Journal of Microelectronics, Electronic Components & Materials, 2019, v. 49, n. 4, p. 211, doi. 10.33180/InfMIDEM2019.403

By:

Worapong Tangsrirat;
Orapin Channumsin;
Jirapun Pimpol

Publication type:

Article

A fast wallace-based parallel multiplier in quantum-dot cellular automata.

Published in:

International Journal of Nano Dimension, 2018, v. 9, n. 1, p. 68

By:

Faraji, Hasan;
Mosleh, Mohammad

Publication type:

Article

A Novel Approach to Design 2-bit Binary Arithmetic Logic Unit (ALU) Circuit Using Optimized 8:1 Multiplexer with Reversible logic.

Published in:

Journal of Communications Software & Systems, 2015, v. 11, n. 2, p. 104, doi. 10.24138/jcomss.v11i2.109

By:

Shukla, Vandana;
Singh, O. P.;
Mishra, G. R.;
Tiwari, R. K.

Publication type:

Article

FAST CARRIER CANCELLATION FOR UHF NEAR FIELD RFID SYSTEMS.

Published in:

Journal of Electromagnetic Waves & Applications, 2012, v. 26, n. 7, p. 863, doi. 10.1080/09205071.2012.710357

By:

Wang, L.;
Xing, Z. J.;
Li, J. Y.;
Wei, K.;
Sandikie, M. S.;
Xu, J. D.

Publication type:

Article

Low Voltage High Performance CMOS Current Mode Four-Quadrant Analog Multiplier Circuit.

Published in:

Radioengineering, 2022, v. 31, n. 2, p. 216, doi. 10.13164/re.2022.0216

By:

ETTAGHZOUTI, Thouraya;
KHLAIFIA, Dalila;
ZITOUNI, Naoufel;
HASSEN, Nejib

Publication type:

Article

VLSI Implementation of Fixed-Point Lattice Wave Digital Filters for Increased Sampling Rate.

Published in:

Radioengineering, 2016, v. 25, n. 4, p. 821, doi. 10.13164/re.2016.0821

By:

AGARWAL, Meenakshi;
RAWAT, Tarun Kumar

Publication type:

Article

Low Voltage Floating Gate MOS Transistor Based Four-Quadrant Multiplier.

Published in:

Radioengineering, 2014, v. 23, p. 1150

By:

SRIVASTAVA, Richa;
GUPTA, Maneesha;
SINGH, Urvashi

Publication type:

Article

A simplest Lorenz-like chaotic circuit and its applications in secure communication and weak signal detection.

Published in:

European Physical Journal: Special Topics, 2021, v. 230, n. 7/8, p. 1933, doi. 10.1140/epjs/s11734-021-00177-y

By:

Xiong, Li;
Qi, Liwan;
Teng, Sufen;
Wang, Qishan;
Wang, Lu;
Zhang, Xinguo

Publication type:

Article

Hardware Efficient Reciprocal Using Second Order Harmonized Parabolic Synthesis and Squaring Shrunk Method.

Published in:

Electronics & Electrical Engineering, 2018, v. 24, n. 2, p. 42, doi. 10.5755/j01.eie.24.2.20635

By:

Jun Luo;
Hongwei Luo;
Yue Zhi;
Xiaoqiang Wang;
Hongfeng Lv;
Ming Dang

Publication type:

Article

FPGA based Improved Hardware Implementation of Booth Wallace Multiplier using Handel C.

Published in:

Electronics & Electrical Engineering, 2011, n. 109, p. 71

By:

Shinde, S. A.;
Kamat, R. K.

Publication type:

Article

Energy-efficient transmission strategies for CoMP downlink—overview, extension, and numerical comparison.

Published in:

EURASIP Journal on Wireless Communications & Networking, 2018, v. 2018, n. 1, p. 1, doi. 10.1186/s13638-018-1214-2

By:

Nguyen, Kien-Giang;
Tervo, Oskari;
Vu, Quang-Doanh;
Tran, Le-Nam;
Juntti, Markku

Publication type:

Article

Optimum multiplierless compensators for sharpened cascaded-integrator-comb decimation filters.

Published in:

Electronics Letters (Wiley-Blackwell), 2018, v. 54, n. 16, p. 971, doi. 10.1049/el.2018.5114

By:

Dudarin, A.;
Molnar, G.;
Vucic, M.

Publication type:

Article

Low-power high-performance CMOS 5-2 compressor with 58 transistors.

Published in:

Electronics Letters (Wiley-Blackwell), 2018, v. 54, n. 5, p. 278, doi. 10.1049/el.2017.3339

By:

Balobas, D.;
Konofaos, N.

Publication type:

Article