Works matching DE "VHDL (Computer hardware description language)"

Results: 122

Decodificador Turbo MAP de varias iteraciones.

Published in:

Ingeniería y Desarrollo, 2006, n. 20, p. 106

By:

Chávez, Richard;
Gamarra, Gabriel;
Pardo, Mauricio

Publication type:

Article

Development of Library Components for Floating Point Processor.

Published in:

Journal of Ultra Scientist of Physical Sciences - Section A (Mathematics), 2021, v. 33, n. 4, p. 42, doi. 10.22147/jusps-A/330402

By:

SHARMA, SUBHASH KUMAR;
DUBEY, SHRI PRAKASH;
MISHRA, ANIL KUMAR

Publication type:

Article

A Review on FPGA Implementation of Distributed Canny Edge Detector.

Published in:

Grenze International Journal of Engineering & Technology (GIJET), 2017, v. 3, n. 3, p. 94

By:

Chandrashekar, N. S.;
Nataraj, K. R.

Publication type:

Article

Invariant-Based Safety Assessment of FPGA Projects: Conception and Technique.

Published in:

Computers (2073-431X), 2021, v. 10, n. 10, p. 125, doi. 10.3390/computers10100125

By:

Kharchenko, Vyacheslav;
Illiashenko, Oleg;
Sklyar, Vladimir

Publication type:

Article

IMAGE CONTOUR SEGMENTATION IN HARDWARE.

Published in:

Radio Electronics, Computer Science, Control, 2015, v. 4, p. 66, doi. 10.15588/1607-3274-2015-4-10

By:

Dimitrios, Amanatidis;
Michael, Dossis;
Iosif, Androulidakis

Publication type:

Article

DESCRIPCIÓN MODULAR DE UN ESQUEMA DE CODIFICACIÓN CONCATENADO PARA CORRECCIÓN DE ERRORES CON PROGRAMACIÓN DE HARDWARE.

Published in:

INGENIARE - Revista Chilena de Ingeniería, 2008, v. 16, n. 3, p. 310

By:

Ruiz, Cecilia E. Sandoval;
Fedón, Antonio

Publication type:

Article

Quantitative comparison of performance analysis techniques for modular and generic network-on-chip.

Published in:

Advances in Radio Science, 2009, v. 7, p. 107, doi. 10.5194/ars-7-107-2009

By:

Neuenhahn, M. C.;
Schleifer, J.;
Blume, H.;
Noll, T. G.

Publication type:

Article

Formal semantics analysis for VHDL RTL synthesis.

Published in:

Computer Systems Science & Engineering, 2003, v. 18, n. 6, p. 357

By:

Haifeng Zhou, D.;
Wei Cao;
Zhenghui Lin

Publication type:

Article

Verifying Digital Components of Physical Systems: Experimental Evaluation of Test Quality.

Published in:

Russian Physics Journal, 2018, v. 60, n. 11, p. 2012, doi. 10.1007/s11182-018-1317-6

By:

Laputenko, A. V.;
López, J. E.;
Yevtushenko, N. V.

Publication type:

Article

Suspended gate field effect transistor type microelectromechanical systems resonators modelling with micro-Raman spectroscopy measured residual stress.

Published in:

Micro & Nano Letters (Wiley-Blackwell), 2013, v. 8, n. 10, p. 614, doi. 10.1049/mnl.2013.0272

By:

Chenxu Zhao;
Mengwei Li;
Xin Guo;
Zewen Liu

Publication type:

Article

Implementación del algoritmo Threefish-256 en hardware reconfigurable.

Published in:

Iteckne, 2014, v. 11, n. 2, p. 149, doi. 10.15332/iteckne.v11i2.725

By:

Nieto-Ramírez, Nathaly;
Nieto-Londoño, Rubén Darío

Publication type:

Article

Synthesizing VHDL from Activity Models in UML 2.

Published in:

International Journal of Circuit Theory & Applications, 2014, v. 42, n. 5, p. 542, doi. 10.1002/cta.1874

By:

Balderas‐Contreras, Tomás;
Cumplido, René;
Rodríguez, Gustavo

Publication type:

Article

Unified FPGA Design for the HEVC Dequantization and Inverse Transform Modules.

Published in:

Computers, Materials & Continua, 2022, v. 71, n. 3, p. 4319, doi. 10.32604/cmc.2022.022988

By:

Alanazi, Turki M.;
Atitallah, Ahmed Ben

Publication type:

Article

Improved Design of Bit Synchronization Clock Extraction in Digital Communication System.

Published in:

Journal of Electrical & Computer Engineering, 2018, p. 1, doi. 10.1155/2018/8024168

By:

Duan, Huimin;
Huang, Hui;
Li, Cuihua

Publication type:

Article

Analysis for Design and Transformation of Autosynchronous State Machines.

Published in:

Radioengineering, 2010, v. 19, n. 1, p. 99

By:

Kováč, Michal;
Kolouch, Jaromír

Publication type:

Article

FPGA-Based Farsi Handwritten Digit Recognition System.

Published in:

International Journal of Simulation: Systems, Science & Technology, 2010, v. 11, n. 2, p. 17

By:

Moradi, Marzieh;
Pourmina, Mohammad Ali;
Razzazi, Farbod

Publication type:

Article

Implementation of IEEE 802.16e Standard on Xilinx ZC706: A C-RAN Prototype.

Published in:

Wireless Personal Communications, 2021, v. 116, n. 3, p. 2187, doi. 10.1007/s11277-020-07786-1

By:

Joodaki, Sadaf;
Fardad, Mohammad;
Alghasi, Saeid;
Jafari, Sajjad;
Moeini, Hossein

Publication type:

Article

Review Report on VHDL (VHSIC Hardware description language).

Published in:

International Journal of Recent Research Aspects, 2018, v. 5, n. 1, p. 85

By:

Grewal, Amit

Publication type:

Article

VHDL-AMS-Based Modeling of an Asymmetric H-Type Half-Bridge Converter for Mutually Coupled SRM.

Published in:

Karaelmas Science & Engineering Journal / Karaelmas Fen ve Mühendislik Dergisi, 2018, v. 8, n. 1, p. 211

By:

Şahin, Cihan;
Amaç, Ayşe Ergün;
Karaçor, Mevlüt

Publication type:

Article

Synthesis and implementation of the ordered access memory in programmable logic devices.

Published in:

Metallurgical & Mining Industry, 2016, n. 4, p. 58

By:

Lishchyna, Nataliia;
Lishchyna, Valerii;
Herasymchuk, Oleh;
Yashchuk, Andrii

Publication type:

Article

A Real-Time Histogram Equalization System with Automatic Gain Control Using FPGA.

Published in:

KSII Transactions on Internet & Information Systems, 2010, v. 4, n. 4, p. 633, doi. 10.3837/tiis.2010.08.0011

By:

Junguk Cho;
Seunghun Jin;
Key Ho Kwon;
Jae Wook Jeon

Publication type:

Article

Algorithm & Design of an Efficient Floating Point ADD/SUB Unit for an Experimental CPU.

Published in:

International Journal of Intelligent Information Technology Application, 2009, v. 2, n. 6, p. 273

By:

Joshi, A.;
Lam, S. L.;
Chan, Y. Y.

Publication type:

Article

SEU Fault-Injection in VHDL-Based Processors: A Case Study.

Published in:

Journal of Electronic Testing, 2013, v. 29, n. 1, p. 87, doi. 10.1007/s10836-013-5351-6

By:

Mansour, Wassim;
Velazco, Raoul

Publication type:

Article

Simulating the effects of logic faults in implementation-level VITAL-compliant models.

Published in:

Computing, 2019, v. 101, n. 2, p. 77, doi. 10.1007/s00607-018-0651-4

By:

Tuzov, Ilya;
de Andrés, David;
Ruiz, Juan-Carlos

Publication type:

Article

Property-Model Methodology: A Model-Based Systems Engineering Approach Using VHDL-AMS.

Published in:

Systems Engineering, 2014, v. 17, n. 3, p. 249, doi. 10.1002/sys.21267

By:

Micouin, Patrice

Publication type:

Article

MODIFIKUOTO POŽYMIŲ VAIZDE IŠSKYRIMO SURF ALGORITMO OBJEKTUI SEKTI REALIUOJU LAIKU ĮGYVENDINIMAS LAUKU PROGRAMUOJAMOJE LOGINĖJE MATRICOJE.

Published in:

Science: Future of Lithuania / Mokslas: Lietuvos Ateitis, 2013, v. 5, n. 2, p. 74, doi. 10.3846/mla.2013.12

By:

Sledevič, Tomyslav

Publication type:

Article

DESIGN AND IMPLEMENTATION OF GA-BASED FUZZY SYSTEM ON FPGA CHIP.

Published in:

Cybernetics & Systems, 2008, v. 39, n. 1, p. 79, doi. 10.1080/01969720701710220

By:

Ching-Chang Wong;
Yu-Han Lin

Publication type:

Article

A case study of varying the EEG localization error using different electrode configurations: Embedded solution.

Published in:

Journal of Information Assurance & Security, 2016, v. 11, n. 5, p. 242

By:

Khemakhem, Rafik;
Frikha, Tarek;
Hadriche, Abir;
Diguet, Jean-Philippe

Publication type:

Article

A New Efficient Symmetric Encryption Algorithm Design and Implementation.

Published in:

Journal of Information Assurance & Security, 2012, v. 7, n. 2, p. 102

By:

Tawalbeh, Lo'ai;
Al-Hajsalem, Hend;
Abu-Qtaish, Tasneem;
Khatatbeh, Ayat

Publication type:

Article

Modeling and Implementation of a Power Estimation Methodology for SystemC.

Published in:

International Journal of Reconfigurable Computing, 2012, p. 1, doi. 10.1155/2012/439727

By:

Kuehnle, Matthias;
Wagner, Andre;
Brito, Alisson V.;
Becker, Juergen

Publication type:

Article

A High-Throughput Hardware Architecture for the H.264/AVC Half-Pixel Motion Estimation Targeting High-Definition Videos.

Published in:

International Journal of Reconfigurable Computing, 2011, p. 1, doi. 10.1155/2011/254730

By:

Corrêa, Marcel M.;
Schoenknecht, Mateus T.;
Dornelles, Robson S.;
Agostini, Luciano V.

Publication type:

Article

vMAGIC--Automatic Code Generation for VHDL.

Published in:

International Journal of Reconfigurable Computing, 2009, p. 1, doi. 10.1155/2009/205149

By:

Pohl, Christopher;
Paiz, Carlos;
Porrmann, Mario

Publication type:

Article

Design of a Mathematical Unit in FPGA for the Implementation of the Control of a Magnetic Levitation System.

Published in:

International Journal of Reconfigurable Computing, 2008, p. 1, doi. 10.1155/2008/634306

By:

Raygoza-Panduro, Juan José;
Ortega-Cisneros, Susana;
Rivera, Jorge;
de laMora, Alberto

Publication type:

Article

VHDL Descriptions for the FPGA Implementation of PWL-Function-Based Multi-Scroll Chaotic Oscillators.

Published in:

PLoS ONE, 2016, v. 11, n. 12, p. 1, doi. 10.1371/journal.pone.0168300

By:

Tlelo-Cuautle, Esteban;
Quintas-Valles, Antonio de Jesus;
de la Fraga, Luis Gerardo;
Rangel-Magdaleno, Jose de Jesus

Publication type:

Article

A virtual interactive teaching environment using XML and augmented reality.

Published in:

International Journal of Electrical Engineering Education, 2001, v. 38, n. 4, p. 316, doi. 10.7227/IJEEE.38.4.5

By:

White, Martin;
Jay, Emmanuel;
Liarokapis, Fotis;
Kostakis, Costas;
Lister, Paul

Publication type:

Article

Improved Data Preprocessing Algorithm for Time-Domain Induced Polarization Method with Digital Notch Filter.

Published in:

Acta Geophysica, 2016, v. 64, n. 6, p. 2264, doi. 10.1515/acgeo-2016-0015

By:

Ge, Shuang-Chao;
Deng, Ming;
Chen, Kai;
Li, Yuan;
Li, Bin

Publication type:

Article

Hardware Architecture for the Implementation of the Discrete Wavelet Transform in two Dimensions.

Published in:

Ingeniería y Competitividad, 2014, v. 16, n. 1, p. 69

By:

Ríos-Cotazo, Norma X.;
Bernal-Noreña, Álvaro

Publication type:

Article

A Synthesizable VHDL Model of the Exact Solution for Three-dimensional Hyperbolic Positioning System.

Published in:

VLSI Design, 2002, v. 15, n. 2, p. 507, doi. 10.1080/1065514021000012129

By:

Bucher, Ralph;
Misra, D.

Publication type:

Article

Design Procedure Based on VHDL Language Transformations.

Published in:

VLSI Design, 2002, v. 14, n. 4, p. 349, doi. 10.1080/10655140290011159

By:

Varga, László;
Hosszú, Gábor;
Kovács, Ferenc

Publication type:

Article

Integrated classifier simulator and neurochip VHDL implementation.

Published in:

International Journal of Computer Mathematics, 2003, v. 80, n. 11, p. 1343, doi. 10.1080/0020716031000148223

By:

Efremides, O. B.;
Bekakos, M. P.;
Evans, D. J.

Publication type:

Article

Efficient Two-Stage Max-Pooling Engines for an FPGA-Based Convolutional Neural Network.

Published in:

Electronics (2079-9292), 2023, v. 12, n. 19, p. 4043, doi. 10.3390/electronics12194043

By:

Hong, Eonpyo;
Choi, Kang-A;
Joo, Jhihoon

Publication type:

Article

Comparison of Different Design Alternatives for Hardware-in-the-Loop of Power Converters.

Published in:

Electronics (2079-9292), 2021, v. 10, n. 8, p. 926, doi. 10.3390/electronics10080926

By:

Zamiri, Elyas;
Sanchez, Alberto;
Yushkova, Marina;
Martínez-García, Maria Sofia;
de Castro, Angel

Publication type:

Article

Fine-Grain Circuit Hardening Through VHDL Datatype Substitution.

Published in:

Electronics (2079-9292), 2019, v. 8, n. 1, p. 24, doi. 10.3390/electronics8010024

By:

Muñoz-Quijada, Maria;
Sanchez-Barea, Samuel;
Vela-Calderon, Daniel;
Guzman-Miranda, Hipolito

Publication type:

Article

Improvements in space radiation-tolerant FPGA implementation of land surface temperature-split window algorithm.

Published in:

International Journal of Electrical & Computer Engineering (2088-8708), 2021, v. 11, n. 5, p. 3844, doi. 10.11591/ijece.v11i5.pp3844-3854

By:

El Makhloufi, Assaad;
Chekroun, Nisrine;
Tagmouti, Noha;
El Adib, Samir;
Raissouni, Naoufal

Publication type:

Article

VHDL Design and FPGA Implementation of a High Data Rate Turbo Decoder based on Majority Logic Codes.

Published in:

International Journal of Electrical & Computer Engineering (2088-8708), 2017, v. 7, n. 4, p. 1824, doi. 10.11591/ijece.v7i4.pp1824-1832

By:

Boudaoud, A.;
El Haroussi, M.;
Abdelmounim, E.

Publication type:

Article

FPGA Based Control Method for Three Phase BLDC Motor.

Published in:

International Journal of Electrical & Computer Engineering (2088-8708), 2016, v. 6, n. 4, p. 1434, doi. 10.11591/ijece.v6i4.10103

By:

Suneeta;
Srinivasan, R.;
Sagar, Ram

Publication type:

Article

Evaluation of High Speed Hardware Multipliers - Fixed Point and Floating point.

Published in:

International Journal of Electrical & Computer Engineering (2088-8708), 2013, v. 3, n. 6, p. 805, doi. 10.11591/ijece.v3i6.4185

By:

Ahmed, Awais;
Abbas, Syed Haider;
Siddique, Muhammad Faheem;
Haider, Hussnain

Publication type:

Article

A Unified Codec Scheme for reduction of Area and Crosstalk in RC and RLC Modeled Interconnects using both Bus Encoding and Shielding Insertion Technique.

Published in:

International Journal of Electrical & Computer Engineering (2088-8708), 2013, v. 3, n. 4, p. 524, doi. 10.11591/ijece.v3i4.3173

By:

Duggal, Dhriti;
Singh, Gurmohan;
Kaur, Manjit

Publication type:

Article

Implementing Quadratic Function with Resource Constraints Using MicroBlaze Soft-Core in Xilinx EDK.

Published in:

IUP Journal of Telecommunications, 2015, v. 7, n. 1, p. 7

By:

Mishra, Ashish;
Kedar, Kunal P.;
Shah, Hardik M.;
Raju, K. S.

Publication type:

Article

FPGA Implementation of EPC Gen-2 Protocol and Its Performance Evaluation.

Published in:

IUP Journal of Telecommunications, 2014, v. 6, n. 1, p. 58

By:

Bag, Joyashree;
Rajanna, K. M.;
Sarkar, Subir Kumar

Publication type:

Article