Works matching DE "TUNNEL field-effect transistors"
Results: 261
Emergence of Quantum Tunneling in Ambipolar Black Phosphorus Multilayers without Heterojunctions.
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- Advanced Functional Materials, 2022, v. 32, n. 13, p. 1, doi. 10.1002/adfm.202110391
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Interlayer Band‐to‐Band Tunneling and Negative Differential Resistance in van der Waals BP/InSe Field‐Effect Transistors.
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- Advanced Functional Materials, 2020, v. 30, n. 15, p. 1, doi. 10.1002/adfm.201910713
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A subthermionic tunnel field-effect transistor with an atomically thin channel.
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- Nature, 2015, v. 526, n. 7571, p. 91, doi. 10.1038/nature15387
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Steep Slope Field Effect Transistors Based on 2D Materials.
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- Advanced Electronic Materials, 2024, v. 10, n. 8, p. 1, doi. 10.1002/aelm.202300625
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Band‐to‐Band Tunneling Control by External Forces: A Key Principle and Applications.
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- Advanced Electronic Materials, 2023, v. 9, n. 2, p. 1, doi. 10.1002/aelm.202201015
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Intrinsic Electronic Transport Properties and Carrier Densities in PtS<sub>2</sub> and SnSe<sub>2</sub>: Exploration of n<sup>+</sup>‐Source for 2D Tunnel FETs.
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- Advanced Electronic Materials, 2021, v. 7, n. 12, p. 1, doi. 10.1002/aelm.202100292
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InGaZnO Tunnel and Junction Transistors Based on Vertically Stacked Black Phosphorus/InGaZnO Heterojunctions.
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- Advanced Electronic Materials, 2020, v. 6, n. 8, p. 1, doi. 10.1002/aelm.202000291
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Low‐Power Computing: Vertical‐Tunneling Field‐Effect Transistor Based on WSe<sub>2</sub>‐MoS<sub>2</sub> Heterostructure with Ion Gel Dielectric (Adv. Electron. Mater. 7/2020).
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- Advanced Electronic Materials, 2020, v. 6, n. 7, p. 1, doi. 10.1002/aelm.202070030
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n‐Type Dirac‐Source Field‐Effect Transistors Based on a Graphene/Carbon Nanotube Heterojunction.
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- Advanced Electronic Materials, 2020, v. 6, n. 7, p. 1, doi. 10.1002/aelm.202000258
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Vertical‐Tunneling Field‐Effect Transistor Based on WSe<sub>2</sub>‐MoS<sub>2</sub> Heterostructure with Ion Gel Dielectric.
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- Advanced Electronic Materials, 2020, v. 6, n. 7, p. 1, doi. 10.1002/aelm.202000091
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High‐Performance Organic Field‐Effect Transistor with Matching Energy‐Band Alignment between Organic Semiconductor and the Charge‐Trapping Dielectric.
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- Advanced Electronic Materials, 2019, v. 5, n. 5, p. N.PAG, doi. 10.1002/aelm.201800865
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Examining the design characteristics of a dual-material gate all-around tunnel FET for use in biosensing applications.
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- Zeitschrift für Physikalische Chemie, 2024, v. 238, n. 3, p. 531, doi. 10.1515/zpch-2023-0476
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Performance investigation of Ge DLTFET based digital integrated circuit.
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- International Journal of Electronics Letters, 2023, v. 11, n. 3, p. 339, doi. 10.1080/21681724.2022.2087914
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Electrostatically Doped Schottky barrier tunnel field effect transistor.
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- International Journal of Electronics Letters, 2022, v. 10, n. 3, p. 333, doi. 10.1080/21681724.2021.1941282
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Tunnel Field-Effect Transistor: Impact of the Asymmetric and Symmetric Ambipolarity on Fault and Performance in Digital Circuits.
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- Journal of Low Power Electronics & Applications, 2022, v. 12, n. 4, p. 58, doi. 10.3390/jlpea12040058
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Guiding and controlling light at nanoscale in field effect transistor.
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- Applied Physics B: Lasers & Optics, 2019, v. 125, n. 6, p. N.PAG, doi. 10.1007/s00340-019-7202-3
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Reconfigurable signal modulation in a ferroelectric tunnel field-effect transistor.
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- Nature Communications, 2023, v. 14, n. 1, p. 1, doi. 10.1038/s41467-023-38242-w
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Strain Engineering in Semiconductor Materials.
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- Physica Status Solidi - Rapid Research Letters, 2025, v. 19, n. 1, p. 1, doi. 10.1002/pssr.202400383
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Sensitivity analysis of bi-metal stacked-gate-oxide hetero-juncture tunnel fet with Si<sub>0.6</sub>Ge<sub>0.4</sub> source biosensor considering non-ideal factors.
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- PLoS ONE, 2024, v. 19, n. 6, p. 1, doi. 10.1371/journal.pone.0301479
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Van der waals BP/InSe heterojunction for tunneling field-effect transistors.
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- Journal of Materials Science, 2021, v. 56, n. 14, p. 8563, doi. 10.1007/s10853-021-05784-7
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Graphene antidot nanoribbon tunnel field‐effect transistor.
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- Micro & Nano Letters (Wiley-Blackwell), 2022, v. 17, n. 8, p. 169, doi. 10.1049/mna2.12107
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TCAD simulation of a double L-shaped gate tunnel field-effect transistor with a covered source-channel.
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- Micro & Nano Letters (Wiley-Blackwell), 2020, v. 15, n. 4, p. 272, doi. 10.1049/mnl.2019.0398
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Analysis of kink reduction and reliability issues in low-voltage DTD-based SOI TFET.
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- Micro & Nano Letters (Wiley-Blackwell), 2020, v. 15, n. 3, p. 130, doi. 10.1049/mnl.2019.0427
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Effect of ITCs on gate stacked JL-TFET based on work-function engineering.
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- Micro & Nano Letters (Wiley-Blackwell), 2019, v. 14, n. 12, p. 1238, doi. 10.1049/mnl.2019.0252
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Analysis of interface trap charges on performance variation in L-shaped tunnel field-effect transistor.
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- Micro & Nano Letters (Wiley-Blackwell), 2019, v. 14, n. 11, p. 1140, doi. 10.1049/mnl.2019.0129
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A comparative investigation of low work-function metal implantation in the oxide region for improving electrostatic characteristics of charge plasma TFET.
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- Micro & Nano Letters (Wiley-Blackwell), 2019, v. 14, n. 2, p. 123, doi. 10.1049/mnl.2018.5390
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Investigation of RF and linearity performance of electrode work-function engineered HDB vertical TFET.
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- Micro & Nano Letters (Wiley-Blackwell), 2019, v. 14, n. 1, p. 17, doi. 10.1049/mnl.2018.530
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Approach to suppress ambipolar conduction in Tunnel FET using dielectric pocket.
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- Micro & Nano Letters (Wiley-Blackwell), 2019, v. 14, n. 1, p. 86, doi. 10.1049/mnl.2018.5276
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Approach for the improvement of sensitivity and sensing speed of TFET-based biosensor by using plasma formation concept.
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- Micro & Nano Letters (Wiley-Blackwell), 2018, v. 13, n. 12, p. 1728, doi. 10.1049/mnl.2018.5252
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Physics-based capacitance model of Gate-on-Source/Channel SOI TFET.
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- Micro & Nano Letters (Wiley-Blackwell), 2018, v. 13, n. 12, p. 1672, doi. 10.1049/mnl.2018.5214
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Impact of gate material engineering on ED-TFET for improving DC/analogue-RF/linearity performances.
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- Micro & Nano Letters (Wiley-Blackwell), 2018, v. 13, n. 12, p. 1653, doi. 10.1049/mnl.2018.5131
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Hetero-material CPTFET with high-frequency and linearity analysis for ultra-low power applications.
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- Micro & Nano Letters (Wiley-Blackwell), 2018, v. 13, n. 11, p. 1609, doi. 10.1049/mnl.2018.5075
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Effective approach to enhance DC and high-frequency performance of electrically doped TFET.
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- Micro & Nano Letters (Wiley-Blackwell), 2018, v. 13, n. 10, p. 1469, doi. 10.1049/mnl.2018.5072
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Performance investigation of a semi-junctionless type II heterojunction tunnel field effect transistor in nanoscale regime.
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- Micro & Nano Letters (Wiley-Blackwell), 2018, v. 13, n. 8, p. 1165, doi. 10.1049/mnl.2017.0877
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Examination of the impingement of interface trap charges on heterogeneous gate dielectric dual material control gate tunnel field effect transistor for the refinement of device reliability.
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- Micro & Nano Letters (Wiley-Blackwell), 2018, v. 13, n. 8, p. 1192, doi. 10.1049/mnl.2017.0869
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Approach to suppress ambipolarity and improve RF and linearity performances on ED-Tunnel FET.
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- Micro & Nano Letters (Wiley-Blackwell), 2018, v. 13, n. 5, p. 684, doi. 10.1049/mnl.2017.0814
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Deep insight into linearity and NQS parameters of tunnel FET with emphasis on lateral straggle.
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- Micro & Nano Letters (Wiley-Blackwell), 2018, v. 13, n. 1, p. 35, doi. 10.1049/mnl.2017.0326
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Analysis of trap-assisted tunnelling in asymmetrical underlap 3D-cylindrical GAA-TFET based on hetero-spacer engineering for improved device reliability.
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- Micro & Nano Letters (Wiley-Blackwell), 2017, v. 12, n. 12, p. 982, doi. 10.1049/mnl.2017.0311
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Performance investigation of hetero material (InAs/Si)-based charge plasma TFET.
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- Micro & Nano Letters (Wiley-Blackwell), 2017, v. 12, n. 6, p. 358, doi. 10.1049/mnl.2016.0688
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Performance estimation of polarity controlled electrostatically doped tunnel field-effect transistor.
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- Micro & Nano Letters (Wiley-Blackwell), 2017, v. 12, n. 4, p. 239, doi. 10.1049/mnl.2016.0729
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Harnessing defects for high-performance MoS<sub>2</sub> tunneling field-effect transistors.
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- Materials Research Letters, 2023, v. 11, n. 4, p. 266, doi. 10.1080/21663831.2022.2145921
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Strained Silicon Single Nanowire Gate-All-Around TFETs with Optimized Tunneling Junctions.
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- Applied Sciences (2076-3417), 2018, v. 8, n. 5, p. 670, doi. 10.3390/app8050670
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Tunnel FET‐based ultra‐lightweight reconfigurable TRNG and PUF design for resource‐constrained internet of things.
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- International Journal of Circuit Theory & Applications, 2021, v. 49, n. 8, p. 2299, doi. 10.1002/cta.3030
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Double‐gate line‐tunneling field‐effect transistor devices for superior analog performance.
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- International Journal of Circuit Theory & Applications, 2021, v. 49, n. 7, p. 2094, doi. 10.1002/cta.3002
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Tunnel FET‐based ultralow‐power and hardware‐secure circuit design considering p‐i‐n forward leakage.
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- International Journal of Circuit Theory & Applications, 2020, v. 48, n. 4, p. 524, doi. 10.1002/cta.2731
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Dirac-source diode with sub-unity ideality factor.
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- Nature Communications, 2022, v. 13, n. 1, p. 1, doi. 10.1038/s41467-022-31849-5
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Analog/RF Performance of T-Shape Gate Dual-Source Tunnel Field-Effect Transistor.
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- Nanoscale Research Letters, 2018, v. 13, n. 1, p. 1, doi. 10.1186/s11671-018-2723-y
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The Optimization of Spacer Engineering for Capacitor-Less DRAM Based on the Dual-Gate Tunneling Transistor.
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- Nanoscale Research Letters, 2018, v. 13, n. 1, p. 0, doi. 10.1186/s11671-018-2483-8
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The Programming Optimization of Capacitorless 1T DRAM Based on the Dual-Gate TFET.
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- Nanoscale Research Letters, 2017, v. 12, n. 1, p. 1, doi. 10.1186/s11671-017-2294-3
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Modeling and Simulation of a TFET-Based Label-Free Biosensor with Enhanced Sensitivity.
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- Chemosensors, 2023, v. 11, n. 5, p. 312, doi. 10.3390/chemosensors11050312
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- Article