Works matching DE "APPLICATION-specific instruction-set processors"
Results: 7
ASIP Performance Enhancement by Hazard Control through Scoreboard.
- Published in:
- Micromachines, 2024, v. 15, n. 11, p. 1287, doi. 10.3390/mi15111287
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- Publication type:
- Article
Hardware Accelerators Targeting a Novel Group Based Packet Classification Algorithm.
- Published in:
- International Journal of Reconfigurable Computing, 2013, p. 1, doi. 10.1155/2013/681894
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- Publication type:
- Article
On the Feasibility and Limitations of Just-in-Time Instruction Set Extension for FPGA-Based Reconfigurable Processors.
- Published in:
- International Journal of Reconfigurable Computing, 2012, p. 1, doi. 10.1155/2012/418315
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- Article
Automatic generation of compiler backends.
- Published in:
- Software: Practice & Experience, 2013, v. 43, n. 2, p. 207, doi. 10.1002/spe.2106
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- Publication type:
- Article
Network Anomaly Detection Based on Wavelet Analysis.
- Published in:
- EURASIP Journal on Advances in Signal Processing, 2009, p. 1, doi. 10.1155/2009/837601
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- Article
Lightweight ASIP Design for Lattice-Based Post-quantum Cryptography Algorithms.
- Published in:
- Arabian Journal for Science & Engineering (Springer Science & Business Media B.V. ), 2025, v. 50, n. 2, p. 835, doi. 10.1007/s13369-024-08976-w
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- Publication type:
- Article
Lightweight ASIP Design for Lattice-Based Post-quantum Cryptography Algorithms.
- Published in:
- Arabian Journal for Science & Engineering (Springer Science & Business Media B.V. ), 2025, v. 50, n. 1, p. 835, doi. 10.1007/s13369-024-08976-w
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- Publication type:
- Article