Works matching IS 09238174 AND DT 2016 AND VI 32 AND IP 3
Results: 15
Dynamic Power Integrity Control of ATE for Eliminating Overkills and Underkills in Device Testing.
- Published in:
- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 257, doi. 10.1007/s10836-016-5582-4
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- Article
A New Capacitance-to-Frequency Converter for On-Chip Capacitance Measurement and Calibration in CMOS Technology.
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- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 393, doi. 10.1007/s10836-016-5584-2
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- Article
A Fast Statistical Soft Error Rate Estimation Method for Nano-scale Combinational Circuits.
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- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 291, doi. 10.1007/s10836-016-5583-3
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- Article
Real-Time Adaptive Test Algorithm Including Test Escape Estimation Method.
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- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 369, doi. 10.1007/s10836-016-5585-1
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- Article
Impact of Fin-Height on SRAM Soft Error Sensitivity and Cell Stability.
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- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 307, doi. 10.1007/s10836-016-5591-3
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- Article
Automatic Feature Selection of Hardware Layout: A Step toward Robust Hardware Trojan Detection.
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- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 357, doi. 10.1007/s10836-016-5581-5
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- Article
Optimization of Boundary Scan Tests Using FPGA-Based Efficient Scan Architectures.
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- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 245, doi. 10.1007/s10836-016-5588-y
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- Publication type:
- Article
Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits.
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- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 273, doi. 10.1007/s10836-016-5589-x
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- Publication type:
- Article
Side-Channel Information Characterisation Based on Cascade-Forward Back-Propagation Neural Network.
- Published in:
- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 345, doi. 10.1007/s10836-016-5590-4
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- Publication type:
- Article
An SEU-Resilient SRAM Bitcell in 65-nm CMOS Technology.
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- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 385, doi. 10.1007/s10836-016-5586-0
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- Publication type:
- Article
High Performance Significance Approximation Error Tolerance Adder for Image Processing Applications.
- Published in:
- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 377, doi. 10.1007/s10836-016-5587-z
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- Publication type:
- Article
Security Path: An Emerging Design Methodology to Protect the FPGA IPs Against Passive/Active Design Tampering.
- Published in:
- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 329, doi. 10.1007/s10836-016-5593-1
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- Publication type:
- Article
Test Technology Newsletter.
- Published in:
- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 243, doi. 10.1007/s10836-016-5594-0
- Publication type:
- Article
Editorial.
- Published in:
- 2016
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- Publication type:
- Editorial
NBTI-Aware Design of Integrated Circuits: A Hardware-Based Approach for Increasing Circuits' Life Time.
- Published in:
- Journal of Electronic Testing, 2016, v. 32, n. 3, p. 315, doi. 10.1007/s10836-016-5592-2
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- Publication type:
- Article